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Message-ID: <1473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com>
Date: Wed, 14 Sep 2016 20:15:50 +0800
From: Zhichang Yuan <yuanzhichang@...ilicon.com>
To: <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linuxarm@...wei.com>
CC: <arnd@...db.de>, <gregkh@...uxfoundation.org>,
<will.deacon@....com>, <devicetree@...r.kernel.org>,
<linux-pci@...r.kernel.org>, <linux-serial@...r.kernel.org>,
<minyard@....org>, <benh@...nel.crashing.org>,
<lorenzo.pieralisi@....com>, <liviu.dudau@....com>,
<zourongrong@...il.com>, <john.garry@...wei.com>,
<gabriele.paoloni@...wei.com>, <zhichang.yuan02@...il.com>,
<kantyzc@....com>, <xuwei5@...ilicon.com>,
"zhichang.yuan" <yuanzhichang@...ilicon.com>
Subject: [PATCH V3 0/4] ARM64 LPC: legacy ISA I/O support
From: "zhichang.yuan" <yuanzhichang@...ilicon.com>
This patch supports the 16550 compatible UART attached to the Low-Pin-Count
interface mplemented on Hisilicon Hip06 SoC. The periperals attached this LPC
include UART, BT, KCS, and so on.
-----------
| LPC host|
| |
-----------
|
_____________V_______________LPC
| |
V V
----------- ------------
| UART | | BT(ipmi)|
----------- ------------
When master accesses those periperals beneath the Hip06 LPC, a specific LPC
driver is needed to make LPC host generate the standard LPC I/O cycles with
the target periperals'I/O port addresses. But on curent arm64 world, there is
no real I/O accesses. All the I/O operations through in/out pair are based on
MMIO which is not satisfied the I/O mechanism on Hip06 LPC.
To solve this issue and keep the relevant existing peripherals' driver
unchanged, this patch set redefines the in/out pair to support both the IO
operations for Hip06 LPC and the original MMIO. The way specific to Hip06 is
named as indirect-IO in this patchset.
This patch set is built based on mainline v4.8-rc6;
Changes from V2:
- Support the PIO retrieval from the linux PIO generated by
pci_address_to_pio. This method replace the 4K PIO reservation in V2;
- Support the flat-tree earlycon;
- Some revises based on Arnd's remarks;
- Make sure the linux PIO range allocated to Hip06 LPC peripherals starts
from non-ZERO;
Changes from V1:
- Support the ACPI LPC device;
- Optimize the dts LPC driver in ISA compatible mode;
- Reserve the IO range below 4K in avoid the possible conflict with PCI host
IO ranges;
- Support the LPC uart and relevant earlycon;
Signed-off-by: Zhichang Yuan <yuanzhichang@...ilicon.com>
zhichang.yuan (4):
ARM64 LPC: Indirect ISA port IO introduced
ARM64 LPC: LPC driver implementation on Hip06
ARM64 LPC: support serial based on low-pin-count
ARM64 LPC: support earlycon for UART connected to LPC
.../arm/hisilicon/hisilicon-low-pin-count.txt | 35 +
.../devicetree/bindings/serial/hisi-lpc-uart.txt | 60 ++
arch/arm64/Kconfig | 6 +
arch/arm64/include/asm/io.h | 90 +++
drivers/bus/Kconfig | 8 +
drivers/bus/Makefile | 2 +
drivers/bus/extio.c | 66 ++
drivers/bus/hisi_lpc.c | 766 +++++++++++++++++++++
drivers/of/address.c | 9 +
drivers/tty/serial/8250/8250_early.c | 26 +-
drivers/tty/serial/8250/8250_hisi_lpc.c | 171 +++++
drivers/tty/serial/8250/Kconfig | 9 +
drivers/tty/serial/8250/Makefile | 1 +
include/linux/extio.h | 49 ++
14 files changed, 1296 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
create mode 100644 Documentation/devicetree/bindings/serial/hisi-lpc-uart.txt
create mode 100644 drivers/bus/extio.c
create mode 100644 drivers/bus/hisi_lpc.c
create mode 100644 drivers/tty/serial/8250/8250_hisi_lpc.c
create mode 100644 include/linux/extio.h
--
1.9.1
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