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Message-ID: <daa2c246-f1dc-de80-21ad-12cb27df6d1a@citrix.com>
Date: Wed, 14 Sep 2016 20:22:42 +0100
From: Andrew Cooper <andrew.cooper3@...rix.com>
To: Andy Lutomirski <luto@...capital.net>, Kyle Huey <me@...ehuey.com>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
John Stultz <john.stultz@...aro.org>,
Ingo Molnar <mingo@...hat.com>, Michal Hocko <mhocko@...e.com>,
Andrew Morton <akpm@...ux-foundation.org>,
"Michael S. Tsirkin" <mst@...hat.com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>,
Vlastimil Babka <vbabka@...e.cz>,
"Luis R. Rodriguez" <mcgrof@...nel.org>,
Mateusz Guzik <mguzik@...hat.com>,
Alex Thorlton <athorlton@....com>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Dmitry Vyukov <dvyukov@...gle.com>,
Vladimir Zapolskiy <vladimir_zapolskiy@...tor.com>,
Jiri Slaby <jslaby@...e.cz>,
Andrey Ryabinin <aryabinin@...tuozzo.com>,
Ben Segall <bsegall@...gle.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
Denys Vlasenko <dvlasenk@...hat.com>,
Paul Gortmaker <paul.gortmaker@...driver.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Robert O'Callahan <robert@...llahan.org>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@...r.kernel.org>, Juergen Gross <jgross@...e.com>,
Linux API <linux-api@...r.kernel.org>,
Fenghua Yu <fenghua.yu@...el.com>,
Kees Cook <keescook@...omium.org>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
Borislav Petkov <bp@...e.de>, Len Brown <len.brown@...el.com>,
Huang Rui <ray.huang@....com>, "H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH] prctl,x86 Add PR_[GET|SET]_CPUID for controlling the
CPUID instruction.
On 14/09/2016 19:52, Andy Lutomirski wrote:
> On Tue, Sep 13, 2016 at 11:13 PM, Kyle Huey <me@...ehuey.com> wrote:
>> On Mon, Sep 12, 2016 at 9:56 AM, Andy Lutomirski <luto@...capital.net> wrote:
>>> You should explicitly check that, if the
>>> feature is set under Xen PV, then the MSR actually works as
>>> advertised. This may require talking to the Xen folks to make sure
>>> you're testing the right configuration.
>> This is interesting. When running under Xen PV the kernel is allowed
>> to read the real value of MSR_PLATFORM_INFO and see that CPUID
>> faulting is supported. But as you suggested, writing to
>> MSR_MISC_FEATURES_ENABLES doesn't actually enable CPUID faulting, at
>> least not in any way that works.
>>
>> It's not obvious to me how to test this, because when this feature
>> works, CPUID only faults in userspace, not in the kernel. Is there
>> existing code somewhere that runs tests like this in userspace?
>>
> Andrew, Boris: should we expect Xen PV to do anything sensible when we
> write to MSR_PLATFORM_INFO to turn on CPUID faulting?
It will drop the write, so "No" is the answer to your question.
> Should the Xen
> PV rdmsr hooks or perhaps the hypervisor mask out the feature if it
> isn't going to be supported?
Yes.
Sadly, whomever hacked these things together in the early days decided
that the most simple solution to getting guests to boot was to allow all
domains default-read access across the CPUID and MSR space, blacklisting
out specific areas known to cause problems. I am in the process of
sorting this stupidity^W "feature" out, but it is taking a while.
What is the purpose of the check? I think it might be easiest to just
do the native thing, and raise a bug in general against Xen citing
"incorrect behaviour with respect to MSR_PLATFORM_INFO", get it fixed in
stable trees and pretend that this breakage never happened.
Short of having a small userspace stub check, I can't see any way to
actually test this, and I certainly would prefer to avoid workarounds
which end up like the OXSAVE detection, which is a complete disaster for
both Linux and Xen.
~Andrew
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