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Message-ID: <1473829927-20466-11-git-send-email-kishon@ti.com>
Date:   Wed, 14 Sep 2016 10:42:06 +0530
From:   Kishon Vijay Abraham I <kishon@...com>
To:     Bjorn Helgaas <bhelgaas@...gle.com>, Arnd Bergmann <arnd@...db.de>,
        Jingoo Han <jingoohan1@...il.com>, <hch@...radead.org>,
        <Joao.Pinto@...opsys.com>, <mingkai.hu@....com>,
        <m-karicheri2@...com>, Pratyush Anand <pratyush.anand@...il.com>
CC:     <linux-pci@...r.kernel.org>, <linux-doc@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-omap@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        Joao Pinto <jpinto@...opsys.com>,
        Rob Herring <robh+dt@...nel.org>, <kishon@...com>,
        <nsekhar@...com>
Subject: [RFC PATCH 10/11] ARM: dts: DRA7: Modify pcie1 dt node for EP mode

Modify pcie1 dt node in order for the controller to operate in
endpoint mode. This is used only for testing EP mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
---
 arch/arm/boot/dts/dra7.dtsi |   43 +++++++++++--------------------------------
 1 file changed, 11 insertions(+), 32 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d9bfb94..73f63d1 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -283,38 +283,17 @@
 			};
 		};
 
-		axi@0 {
-			compatible = "simple-bus";
-			#size-cells = <1>;
-			#address-cells = <1>;
-			ranges = <0x51000000 0x51000000 0x3000
-				  0x0	     0x20000000 0x10000000>;
-			pcie1: pcie@...00000 {
-				compatible = "ti,dra7-pcie";
-				reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
-				reg-names = "rc_dbics", "ti_conf", "config";
-				interrupts = <0 232 0x4>, <0 233 0x4>;
-				#address-cells = <3>;
-				#size-cells = <2>;
-				device_type = "pci";
-				ranges = <0x81000000 0 0          0x03000 0 0x00010000
-					  0x82000000 0 0x20013000 0x13000 0 0xffed000>;
-				#interrupt-cells = <1>;
-				num-lanes = <1>;
-				ti,hwmods = "pcie1";
-				phys = <&pcie1_phy>;
-				phy-names = "pcie-phy0";
-				interrupt-map-mask = <0 0 0 7>;
-				interrupt-map = <0 0 0 1 &pcie1_intc 1>,
-						<0 0 0 2 &pcie1_intc 2>,
-						<0 0 0 3 &pcie1_intc 3>,
-						<0 0 0 4 &pcie1_intc 4>;
-				pcie1_intc: interrupt-controller {
-					interrupt-controller;
-					#address-cells = <0>;
-					#interrupt-cells = <1>;
-				};
-			};
+		pcie1: pcie@...00000 {
+			compatible = "ti,dra7-pcie-ep";
+			reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>;
+			reg-names = "ep_dbics", "ti_conf", "ep_dbics2";
+			interrupts = <0 232 0x4>;
+			num-lanes = <1>;
+			num-ib-windows = <4>;
+			num-ob-windows = <16>;
+			ti,hwmods = "pcie1";
+			phys = <&pcie1_phy>;
+			phy-names = "pcie-phy0";
 		};
 
 		axi@1 {
-- 
1.7.9.5

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