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Message-ID: <3E5A0FA7E9CA944F9D5414FEC6C712205DFFA5CD@ORSMSX106.amr.corp.intel.com>
Date: Thu, 15 Sep 2016 21:36:03 +0000
From: "Yu, Fenghua" <fenghua.yu@...el.com>
To: Thomas Gleixner <tglx@...utronix.de>
CC: "Anvin, H Peter" <h.peter.anvin@...el.com>,
Ingo Molnar <mingo@...e.hu>,
"Luck, Tony" <tony.luck@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
Tejun Heo <tj@...nel.org>, Borislav Petkov <bp@...e.de>,
Stephane Eranian <eranian@...gle.com>,
Marcelo Tosatti <mtosatti@...hat.com>,
"David Carrillo-Cisneros" <davidcc@...gle.com>,
Shaohua Li <shli@...com>,
"Shankar, Ravi V" <ravi.v.shankar@...el.com>,
Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
"Prakhya, Sai Praneeth" <sai.praneeth.prakhya@...el.com>,
linux-kernel <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>
Subject: RE: [PATCH v2 10/33] x86/intel_rdt: Implement scheduling support
for Intel RDT
> From: Thomas Gleixner [mailto:tglx@...utronix.de]
> Sent: Thursday, September 08, 2016 2:54 AM
>
> On Thu, 8 Sep 2016, Fenghua Yu wrote:
> > +extern struct static_key rdt_enable_key; void
> > +__intel_rdt_sched_in(void *dummy);
> > +
> > struct clos_cbm_table {
> > unsigned long cbm;
> > unsigned int clos_refcnt;
> > };
> >
> > +/*
> > + * intel_rdt_sched_in() - Writes the task's CLOSid to IA32_PQR_MSR
> > + *
> > + * Following considerations are made so that this has minimal impact
> > + * on scheduler hot path:
> > + * - This will stay as no-op unless we are running on an Intel SKU
> > + * which supports L3 cache allocation.
> > + * - When support is present and enabled, does not do any
> > + * IA32_PQR_MSR writes until the user starts really using the feature
> > + * ie creates a rdtgroup directory and assigns a cache_mask thats
> > + * different from the root rdtgroup's cache_mask.
> > + * - Caches the per cpu CLOSid values and does the MSR write only
> > + * when a task with a different CLOSid is scheduled in. That
> > + * means the task belongs to a different rdtgroup.
> > + * - Closids are allocated so that different rdtgroup directories
> > + * with same cache_mask gets the same CLOSid. This minimizes CLOSids
> > + * used and reduces MSR write frequency.
> > + */
> > +static inline void intel_rdt_sched_in(void) {
> > + /*
> > + * Call the schedule in code only when RDT is enabled.
> > + */
> > + if (static_key_false(&rdt_enable_key))
>
> static_branch_[un]likely() is the proper function to use.
How to do this? Should I change the line to
+ if (static_branch_unlikely(&rdt_enable_key))
?
Thanks.
-Fenghua
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