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Message-ID: <20160915224814.656184-7-salil.mehta@huawei.com>
Date:   Thu, 15 Sep 2016 23:48:11 +0100
From:   Salil Mehta <salil.mehta@...wei.com>
To:     <dledford@...hat.com>
CC:     <salil.mehta@...wei.com>, <xavier.huwei@...wei.com>,
        <oulijun@...wei.com>, <yisen.zhuang@...wei.com>,
        <mehta.salil.lnk@...il.com>, <xuwei5@...ilicon.com>,
        <linux-rdma@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linuxarm@...wei.com>
Subject: [PATCH V3 for-next 6/9] IB/hns: Change the logic for allocating uar registers

From: Lijun Ou <oulijun@...wei.com>

This patch mainly modifies the logic for allocating uar registers.
In HiP06 SoC, HW has 8 group of uar registers for kernel and
user space application. The uar index is assigned as follows:
    0   ------ for kernel
    1~7 ------ for user space application

Signed-off-by: Lijun Ou <oulijun@...wei.com>
Reviewed-by: Wei Hu <xavier.huwei@...wei.com>
Signed-off-by: Salil Mehta <salil.mehta@...wei.com>
---
 drivers/infiniband/hw/hns/hns_roce_pd.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/infiniband/hw/hns/hns_roce_pd.c b/drivers/infiniband/hw/hns/hns_roce_pd.c
index 16271b5..4109f74 100644
--- a/drivers/infiniband/hw/hns/hns_roce_pd.c
+++ b/drivers/infiniband/hw/hns/hns_roce_pd.c
@@ -117,7 +117,9 @@ int hns_roce_uar_alloc(struct hns_roce_dev *hr_dev, struct hns_roce_uar *uar)
 	if (ret == -1)
 		return -ENOMEM;
 
-	uar->index = (uar->index - 1) % hr_dev->caps.phy_num_uars + 1;
+	if (uar->index > 0)
+		uar->index = (uar->index - 1) %
+			     (hr_dev->caps.phy_num_uars - 1) + 1;
 
 	res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0);
 	uar->pfn = ((res->start) >> PAGE_SHIFT) + uar->index;
-- 
1.9.1


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