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Message-Id: <874m5bxpai.fsf@linux.vnet.ibm.com>
Date: Tue, 20 Sep 2016 08:15:09 +0530
From: "Aneesh Kumar K.V" <aneesh.kumar@...ux.vnet.ibm.com>
To: christophe leroy <christophe.leroy@....fr>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
Scott Wood <oss@...error.net>
Cc: linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH v2 2/3] powerpc: get hugetlbpage handling more generic
christophe leroy <christophe.leroy@....fr> writes:
>>
>>
>>> for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
>>> unsigned shift;
>>> unsigned pdshift;
>>> @@ -860,16 +807,31 @@ static int __init hugetlbpage_init(void)
>>> * if we have pdshift and shift value same, we don't
>>> * use pgt cache for hugepd.
>>> */
>>> - if (pdshift != shift) {
>>> + if (pdshift > shift) {
>>> pgtable_cache_add(pdshift - shift, NULL);
>>> if (!PGT_CACHE(pdshift - shift))
>>> panic("hugetlbpage_init(): could not create "
>>> "pgtable cache for %d bit pagesize\n", shift);
>>> + } else if (!hugepte_cache) {
>>> + /*
>>> + * Create a kmem cache for hugeptes. The bottom bits in
>>> + * the pte have size information encoded in them, so
>>> + * align them to allow this
>>> + */
>>> + hugepte_cache = kmem_cache_create("hugepte-cache",
>>> + sizeof(pte_t),
>>> + HUGEPD_SHIFT_MASK + 1,
>>> + 0, NULL);
>>> + if (hugepte_cache == NULL)
>>> + panic("%s: Unable to create kmem cache "
>>> + "for hugeptes\n", __func__);
>>> +
>>
>>
>> We don't need hugepte_cache for book3s 64K. I guess we will endup
>> creating one here ?
>
> Should not, because on book3s 64k, we will have pdshift > shift
> won't we ?
>
on 64k book3s, we have pdshift == shift and we don't need to create
hugepd cache on book3s 64k.
-aneesh
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