linux-kernel - Re: [PATCH 05/61] perf tools: Introduce c2c_decode

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Message-ID: <20160921091829.GA12399@krava>
Date:   Wed, 21 Sep 2016 11:18:29 +0200
From:   Jiri Olsa <jolsa@...hat.com>
To:     Stanislav Ievlev <stanislav.ievlev@...il.com>
Cc:     Jiri Olsa <jolsa@...nel.org>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        lkml <linux-kernel@...r.kernel.org>,
        Don Zickus <dzickus@...hat.com>, Joe Mario <jmario@...hat.com>,
        Ingo Molnar <mingo@...nel.org>,
        Peter Zijlstra <a.p.zijlstra@...llo.nl>,
        Namhyung Kim <namhyung@...nel.org>,
        David Ahern <dsahern@...il.com>,
        Andi Kleen <andi@...stfloor.org>
Subject: Re: [PATCH 05/61] perf tools: Introduce c2c_decode_stats function

On Wed, Sep 21, 2016 at 09:08:40AM +0000, Stanislav Ievlev wrote:
> Hi, Jiri!
> 
> Why are you not using unsigned integer for counters in c2c_stats structure?

hi,
never really thought of that, because that's one of the original
patches I could take almost untouched.. so no real reason ;-)

jirka

> 
> On Mon, Sep 19, 2016 at 4:27 PM Jiri Olsa <jolsa@...nel.org> wrote:
> 
> > Introducing c2c_decode_stats function, which decodes
> > data_src data into new struct c2c_stats.
> >
> > +struct c2c_stats {
> > +       int     nr_entries;
> > +
> > +       int     locks;               /* count of 'lock' transactions */
> > +       int     store;               /* count of all stores in trace */
> > +       int     st_uncache;          /* stores to uncacheable address */
> > +       int     st_noadrs;           /* cacheable store with no address */
> > +       int     st_l1hit;            /* count of stores that hit L1D */
> > +       int     st_l1miss;           /* count of stores that miss L1D */
> > +       int     load;                /* count of all loads in trace */
> > +       int     ld_excl;             /* exclusive loads, rmt/lcl DRAM -
> > snp none/miss */
> > +       int     ld_shared;           /* shared loads, rmt/lcl DRAM - snp
> > hit */
> > +       int     ld_uncache;          /* loads to uncacheable address */
> > +       int     ld_io;               /* loads to io address */
> > +       int     ld_miss;             /* loads miss */
> > +       int     ld_noadrs;           /* cacheable load with no address */
> > +       int     ld_fbhit;            /* count of loads hitting Fill Buffer
> > */
> > +       int     ld_l1hit;            /* count of loads that hit L1D */
> > +       int     ld_l2hit;            /* count of loads that hit L2D */
> > +       int     ld_llchit;           /* count of loads that hit LLC */
> > +       int     lcl_hitm;            /* count of loads with local HITM  */
> > +       int     rmt_hitm;            /* count of loads with remote HITM */
> > +       int     rmt_hit;             /* count of loads with remote hit
> > clean; */
> > +       int     lcl_dram;            /* count of loads miss to local DRAM
> > */
> > +       int     rmt_dram;            /* count of loads miss to remote DRAM
> > */
> > +       int     nomap;               /* count of load/stores with no phys
> > adrs */
> > +       int     noparse;             /* count of unparsable data sources */
> > +};
> >
> >