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Message-ID: <CALCETrVeJPzxhue5=Jj1uhF3=skVwkbVOQvjEPMYH=DvJBfNjw@mail.gmail.com>
Date: Wed, 21 Sep 2016 17:11:03 -0700
From: Andy Lutomirski <luto@...capital.net>
To: Andy Lutomirski <luto@...nel.org>
Cc: Keith Busch <keith.busch@...el.com>, Jens Axboe <axboe@...com>,
linux-nvme@...ts.infradead.org, Christoph Hellwig <hch@....de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
J Freyensee <james_p_freyensee@...ux.intel.com>
Subject: Re: [PATCH v4 0/3] nvme power saving
On Fri, Sep 16, 2016 at 11:16 AM, Andy Lutomirski <luto@...nel.org> wrote:
> Hi all-
>
> Here's v4 of the APST patch set. The biggest bikesheddable thing (I
> think) is the scaling factor. I currently have it hardcoded so that
> we wait 50x the total latency before entering a power saving state.
> On my Samsung 950, this means we enter state 3 (70mW, 0.5ms entry
> latency, 5ms exit latency) after 275ms and state 4 (5mW, 2ms entry
> latency, 22ms exit latency) after 1200ms. I have the default max
> latency set to 25ms.
Anything I can/should do to help this make it for 4.9? :)
--Andy
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