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Message-ID: <tip-08b90f0655258411a1b41d856331e20e7ec8d55c@git.kernel.org>
Date: Thu, 22 Sep 2016 07:00:47 -0700
From: tip-bot for Alexander Shishkin <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: torvalds@...ux-foundation.org, eranian@...gle.com,
jolsa@...hat.com, alexander.shishkin@...ux.intel.com,
vincent.weaver@...ne.edu, peterz@...radead.org,
linux-kernel@...r.kernel.org, mingo@...nel.org, acme@...hat.com,
acme@...radead.org, a.p.zijlstra@...llo.nl, hpa@...or.com,
tglx@...utronix.de
Subject: [tip:perf/urgent] perf/x86/intel/bts: Make it an exclusive PMU
Commit-ID: 08b90f0655258411a1b41d856331e20e7ec8d55c
Gitweb: http://git.kernel.org/tip/08b90f0655258411a1b41d856331e20e7ec8d55c
Author: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
AuthorDate: Tue, 20 Sep 2016 18:48:10 +0300
Committer: Ingo Molnar <mingo@...nel.org>
CommitDate: Thu, 22 Sep 2016 14:56:08 +0200
perf/x86/intel/bts: Make it an exclusive PMU
Just like intel_pt, intel_bts can only handle one event at a time,
which is the reason we introduced PERF_PMU_CAP_EXCLUSIVE in the first
place. However, at the moment one can have as many intel_bts events
within the same context at the same time as one pleases. Only one of
them, however, will get scheduled and receive the actual trace data.
Fix this by making intel_bts an "exclusive" PMU.
Signed-off-by: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Arnaldo Carvalho de Melo <acme@...radead.org>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Vince Weaver <vincent.weaver@...ne.edu>
Cc: vince@...ter.net
Link: http://lkml.kernel.org/r/20160920154811.3255-2-alexander.shishkin@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
arch/x86/events/intel/bts.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c
index 6ff66ef..982c9e3 100644
--- a/arch/x86/events/intel/bts.c
+++ b/arch/x86/events/intel/bts.c
@@ -584,7 +584,8 @@ static __init int bts_init(void)
if (!boot_cpu_has(X86_FEATURE_DTES64) || !x86_pmu.bts)
return -ENODEV;
- bts_pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_ITRACE;
+ bts_pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_ITRACE |
+ PERF_PMU_CAP_EXCLUSIVE;
bts_pmu.task_ctx_nr = perf_sw_context;
bts_pmu.event_init = bts_event_init;
bts_pmu.add = bts_event_add;
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