lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CACRpkdZHdGPS0FsqT8Ljgq9+uLfR1p7UtD13+fR8BB0z6PH0TA@mail.gmail.com>
Date:   Fri, 23 Sep 2016 14:47:12 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc:     Marc Zyngier <marc.zyngier@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Phidias Chiang <phidias.chiang@...onical.com>,
        Anisse Astier <anisse@...ier.eu>,
        Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
        Yu C Chen <yu.c.chen@...el.com>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 1/3] gpiolib: Make it possible to exclude GPIOs from
 IRQ domain

On Tue, Sep 20, 2016 at 2:15 PM, Mika Westerberg
<mika.westerberg@...ux.intel.com> wrote:

> When using GPIO irqchip helpers to setup irqchip for a gpiolib based
> driver, it is not possible to select which GPIOs to add to the IRQ domain.
> Instead it just adds all GPIOs which is not always desired. For example
> there might be GPIOs that for some reason cannot generated normal
> interrupts at all.
>
> To support this we add a flag irq_need_valid_mask to struct gpio_chip. When
> this flag is set the core allocates irq_valid_mask that holds one bit for
> each GPIO the chip has. By default all bits are set but drivers can
> manipulate this using set_bit() and clear_bit() accordingly.
>
> Then when gpiochip_irqchip_add() is called, this mask is checked and all
> GPIOs with bit is set are added to the IRQ domain created for the GPIO
> chip.
>
> Suggested-by: Linus Walleij <linus.walleij@...aro.org>
> Signed-off-by: Mika Westerberg <mika.westerberg@...ux.intel.com>

Yeps, exactly like this!

Patch applied.

Yours,
Linus Walleij

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ