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Message-ID: <20160923214616.GA30743@rob-hp-laptop>
Date: Fri, 23 Sep 2016 16:46:16 -0500
From: Rob Herring <robh@...nel.org>
To: Brian Norris <briannorris@...omium.org>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>, linux-kernel@...r.kernel.org,
Shawn Lin <shawn.lin@...k-chips.com>,
devicetree@...r.kernel.org, Jeffy Chen <jeffy.chen@...k-chips.com>,
Wenrui Li <wenrui.li@...k-chips.com>,
Heiko Stuebner <heiko@...ech.de>, linux-pci@...r.kernel.org,
linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH] PCI: rockchip: Support quirk to disable 5 GT/s (PCIe
2.x) link rate
On Thu, Sep 22, 2016 at 10:31:18AM -0700, Brian Norris wrote:
> rk3399 supports PCIe 2.x link speeds marginally at best, and on some
> boards, the link won't train at 5 GT/s at all. Rather than sacrifice 500
> ms waiting for training that will never happen, let's support a device
> tree quirk flag to disable generation 2 speeds entirely.
>
> Signed-off-by: Brian Norris <briannorris@...omium.org>
> ---
> .../devicetree/bindings/pci/rockchip-pcie.txt | 2 +
> drivers/pci/host/pcie-rockchip.c | 57 +++++++++++++---------
> 2 files changed, 37 insertions(+), 22 deletions(-)
Acked-by: Rob Herring <robh@...nel.org>
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