linux-kernel - Re: [PATCH v5 6/6] x86/arch_prctl Add ARCH_[GET|SET]

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Message-ID: <CAP045AqpW09v3HgZN8cxhdegMpDC3dU504K-QuGXmSZS=jJKNw@mail.gmail.com>
Date:   Mon, 26 Sep 2016 12:56:04 -0700
From:   Kyle Huey <me@...ehuey.com>
To:     Andy Lutomirski <luto@...capital.net>
Cc:     "Robert O'Callahan" <robert@...llahan.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "H . Peter Anvin" <hpa@...or.com>, X86 ML <x86@...nel.org>,
        Jeff Dike <jdike@...toit.com>,
        Richard Weinberger <richard@....at>,
        Andy Lutomirski <luto@...nel.org>,
        Borislav Petkov <bp@...e.de>,
        Dmitry Safonov <dsafonov@...tuozzo.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Alexander Viro <viro@...iv.linux.org.uk>,
        Shuah Khan <shuah@...nel.org>, Len Brown <len.brown@...el.com>,
        "Rafael J . Wysocki" <rafael.j.wysocki@...el.com>,
        Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "user-mode-linux-devel@...ts.sourceforge.net" 
        <user-mode-linux-devel@...ts.sourceforge.net>,
        "open list:USER-MODE LINUX (UML)" 
        <user-mode-linux-user@...ts.sourceforge.net>,
        "open list:KERNEL SELFTEST FRAMEWORK" 
        <linux-kselftest@...r.kernel.org>,
        Linux API <linux-api@...r.kernel.org>
Subject: Re: [PATCH v5 6/6] x86/arch_prctl Add ARCH_[GET|SET]_CPUID

On Thu, Sep 22, 2016 at 3:22 PM, Andy Lutomirski <luto@...capital.net> wrote:
> On Wed, Sep 21, 2016 at 11:58 AM, Kyle Huey <me@...ehuey.com> wrote:
>> Intel supports faulting on the CPUID instruction beginning with Ivy Bridge.
>> When enabled, the processor will fault on attempts to execute the CPUID
>> instruction with CPL>0. Exposing this feature to userspace will allow a
>> ptracer to trap and emulate the CPUID instruction.
>>
>> When supported, this feature is controlled by toggling bit 0 of
>> MSR_MISC_FEATURES_ENABLES. It is documented in detail in Section 2.3.2 of
>> http://www.intel.com/content/dam/www/public/us/en/documents/application-notes/virtualization-technology-flexmigration-application-note.pdf
>>
>
>> +       if (!test_and_set_thread_flag(TIF_NOCPUID))
>> +               /*
>> +                * Must flip the CPU state synchronously with
>> +                * TIF_NOCPUID in the current running context.
>> +                */
>> +               switch_cpuid_faulting(true);
>
> If statements with multiple indented lines should have braces in my
> book.  See, for example, "goto fail".
>
>
> static?
>
>> +int set_cpuid_mode(struct task_struct *task, unsigned long val)
>
> static?
>
>> + * Called immediately after a successful exec.
>> + */
>> +void arch_post_exec(void)
>> +{
>> +       /* If cpuid was previously disabled for this task, re-enable it. */
>> +       if (test_thread_flag(TIF_NOCPUID))
>> +               enable_cpuid();
>> +}
>
>> diff --git a/fs/exec.c b/fs/exec.c
>> index 6fcfb3f..0272b7e 100644
>> --- a/fs/exec.c
>> +++ b/fs/exec.c
>> @@ -1287,6 +1287,7 @@ void setup_new_exec(struct linux_binprm * bprm)
>>         else
>>                 set_dumpable(current->mm, suid_dumpable);
>>
>> +       arch_post_exec();
>
> Let's call this arch_setup_new_exec().
>
>>         perf_event_exec();
>>         __set_task_comm(current, kbasename(bprm->filename), true);
>>
>> diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
>> index 2b5b10e..22a3f61 100644
>> --- a/include/linux/thread_info.h
>> +++ b/include/linux/thread_info.h
>> @@ -130,6 +130,10 @@ static inline void check_object_size(const void *ptr, unsigned long n,
>>  { }
>>  #endif /* CONFIG_HARDENED_USERCOPY */
>>
>> +#ifndef arch_post_exec
>> +static inline void arch_post_exec(void) {}
>> +#endif
>> +
>
> thread_info.h is a weird place for this IMO.  Admittedly, elf.h isn't
> a whole lot better.

Maybe fs.h?

- Kyle