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Message-Id: <1475322326-160112-8-git-send-email-srinivas.pandruvada@linux.intel.com>
Date: Sat, 1 Oct 2016 04:45:24 -0700
From: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
To: rjw@...ysocki.net, tglx@...utronix.de, mingo@...hat.com, bp@...e.de
Cc: x86@...nel.org, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org,
peterz@...radead.org, tim.c.chen@...ux.intel.com, jolsa@...hat.com,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Subject: [PATCH v5 7/9] acpi: bus: Enable HWP CPPC objects
Need to set platform wide _OSC bits to enable CPPC and CPPC version 2.
If platform supports CPPC, then BIOS exposes CPPC tables.
The primary reason to enable CPPC support is to get the maximum
performance of each CPU to check and enable Intel Turbo Boost Max
Technology 3.0 (ITMT).
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
---
drivers/acpi/bus.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 85b7d07..61643a5 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -330,6 +330,13 @@ static void acpi_bus_osc_support(void)
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_HOTPLUG_OST_SUPPORT;
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PCLPI_SUPPORT;
+#ifdef CONFIG_X86
+ if (boot_cpu_has(X86_FEATURE_HWP)) {
+ capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPC_SUPPORT;
+ capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_CPCV2_SUPPORT;
+ }
+#endif
+
if (!ghes_disable)
capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_APEI_SUPPORT;
if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
--
2.7.4
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