| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <1475579471-11308-2-git-send-email-john.garry@huawei.com>
Date: Tue, 4 Oct 2016 19:11:09 +0800
From: John Garry <john.garry@...wei.com>
To: <jejb@...ux.vnet.ibm.com>, <martin.petersen@...cle.com>,
<robh+dt@...nel.org>, <mark.rutland@....com>
CC: <linuxarm@...wei.com>, <xuwei5@...ilicon.com>,
<john.garry2@...l.dcu.ie>, <linux-scsi@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<hare@...e.com>, John Garry <john.garry@...wei.com>,
Xiang Chen <chenxiang66@...ilicon.com>
Subject: [PATCH v2 1/3] devicetree: bindings: scsi: hisi_sas add hip07 support
Add support for hip07 chipset to hisi_sas controller.
Chipset hip07 has v2 hw.
Signed-off-by: John Garry <john.garry@...wei.com>
Signed-off-by: Xiang Chen <chenxiang66@...ilicon.com>
---
Documentation/devicetree/bindings/scsi/hisilicon-sas.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
index bf2411f..2a42a32 100644
--- a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
+++ b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
@@ -6,6 +6,7 @@ Main node required properties:
- compatible : value should be as follows:
(a) "hisilicon,hip05-sas-v1" for v1 hw in hip05 chipset
(b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset
+ (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset
- sas-addr : array of 8 bytes for host SAS address
- reg : Address and length of the SAS register
- hisilicon,sas-syscon: phandle of syscon used for sas control
--
1.9.1
Powered by blists - more mailing lists