lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [day] [month] [year] [list]
Message-Id: <WM!ed3fbaeb0522ef511432f86a8f960e4450d5dc585c3e6a7282707c963f20491527420d38f737d38adb9ab7cba9794282!@dg.advantech.com>
Date:   Thu, 6 Oct 2016 16:26:32 -0700
From:   "Ken.Lin" <ken.lin@...antech.com>
To:     "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "sboyd@...eaurora.org" <sboyd@...eaurora.org>,
        "mturquette@...libre.com" <mturquette@...libre.com>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Peter.Stretz" <peter.stretz@...antech.com>,
        "Peter.Chiang" <peter.chiang@...antech.com>,
        Akshay Bhat <akshay.bhat@...esys.com>
Subject: RE: The possible regression in kernel 4.8 - clk: imx: correct AV
 PLL rate formula



-----Original Message-----
From: Ken.Lin 
Sent: Thursday, October 6, 2016 4:21 PM
To: 'shawnguo@...nel.org'; 'kernel@...gutronix.de'; 'sboyd@...eaurora.org'; 'mturquette@...libre.com'
Cc: 'linux-arm-kernel@...ts.infradead.org'; 'linux-clk@...r.kernel.org'; 'linux-kernel@...r.kernel.org'; Peter.Stretz; Peter.Chiang; Akshay Bhat
Subject: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

Hi,

We found a possible regression issue (not seen in kernel 4.7-stable), which has to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c when we did a DP test (1920x1080@60) with clock source PLL5.
The DP desired pixel clock (148.5MHz that is calculated from the input of PLL output frequency) would be correct again when we reverted this commit.
Could you please help check if the commit has the side effect since it would have impacts on our on-going project when it requires moving from kernel 4.7 to kernel 4.8 or newer version?

Please check the following URL for the details
https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_imx_correct_VL_PLL_rate_formula.pdf?dl=0


Thank you

Cheers,
Ken Lin

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ