[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1475853518-22264-9-git-send-email-pantelis.antoniou@konsulko.com>
Date: Fri, 7 Oct 2016 18:18:36 +0300
From: Pantelis Antoniou <pantelis.antoniou@...sulko.com>
To: Lee Jones <lee.jones@...aro.org>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Alexandre Courbot <gnurou@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Frank Rowand <frowand.list@...il.com>,
Wolfram Sang <wsa@...-dreams.de>,
David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Wim Van Sebroeck <wim@...ana.be>,
Peter Rosin <peda@...ntia.se>,
Debjit Ghosh <dghosh@...iper.net>,
Georgi Vlaev <gvlaev@...iper.net>,
Guenter Roeck <linux@...ck-us.net>,
Maryam Seraj <mseraj@...iper.net>,
Pantelis Antoniou <pantelis.antoniou@...sulko.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-i2c@...r.kernel.org,
linux-mtd@...ts.infradead.org, linux-watchdog@...r.kernel.org,
netdev@...r.kernel.org
Subject: [PATCH 08/10] mtd: flash-sam: Bindings for Juniper's SAM FPGA flash
From: Georgi Vlaev <gvlaev@...iper.net>
Add binding document for Junipers Flash IP block present
in the SAM FPGA on PTX series of routers.
Signed-off-by: Georgi Vlaev <gvlaev@...iper.net>
[Ported from Juniper kernel]
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@...sulko.com>
---
.../devicetree/bindings/mtd/flash-sam.txt | 31 ++++++++++++++++++++++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/flash-sam.txt
diff --git a/Documentation/devicetree/bindings/mtd/flash-sam.txt b/Documentation/devicetree/bindings/mtd/flash-sam.txt
new file mode 100644
index 0000000..bdf1d78
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/flash-sam.txt
@@ -0,0 +1,31 @@
+Flash device on a Juniper SAM FPGA
+
+These flash chips are found in the PTX series of Juniper routers.
+
+They are regular CFI compatible (Intel or AMD extended) flash chips with
+some special write protect/VPP bits that can be controlled by the machine's
+system controller.
+
+Required properties:
+- compatible : must be "jnx,flash-sam"
+
+Optional properties:
+- reg : memory address for the flash chip, note that this is not
+required since usually the device is a subdevice of the SAM MFD
+driver which fills in the register fields.
+
+For the rest of the properties, see mtd-physmap.txt.
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. See partition.txt for more detail.
+
+Example:
+
+flash_sam {
+ compatible = "jnx,flash-sam";
+ partition@0 {
+ reg = <0x0 0x400000>;
+ label = "pic0-golden";
+ read-only;
+ };
+};
--
1.9.1
Powered by blists - more mailing lists