linux-kernel - RE: [PATCH] pinctrl: intel: Configure GPIO chip IRQ as wakeup interrupts

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Message-ID: <EDC3C55F9AA4D042AD86F2BFE2FD250C017A8102@FMSMSX102.amr.corp.intel.com>
Date:   Fri, 7 Oct 2016 18:17:36 +0000
From:   "Bacchewar, Nilesh" <nilesh.bacchewar@...el.com>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
CC:     Mika Westerberg <mika.westerberg@...ux.intel.com>,
        "Krogerus, Heikki" <heikki.krogerus@...ux.intel.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] pinctrl: intel: Configure GPIO chip IRQ as wakeup
 interrupts

Here, Its marking  GPIO controller IRQ line as wake capable not GPIO lines.

Regards,
Nilesh

-----Original Message-----
From: Andy Shevchenko [mailto:andy.shevchenko@...il.com] 
Sent: Friday, October 7, 2016 10:59 AM
To: Bacchewar, Nilesh <nilesh.bacchewar@...el.com>
Cc: Mika Westerberg <mika.westerberg@...ux.intel.com>; Krogerus, Heikki <heikki.krogerus@...ux.intel.com>; Linus Walleij <linus.walleij@...aro.org>; linux-gpio@...r.kernel.org; linux-kernel@...r.kernel.org
Subject: Re: [PATCH] pinctrl: intel: Configure GPIO chip IRQ as wakeup interrupts

On Thu, Sep 22, 2016 at 2:03 AM, Nilesh Bacchewar <nilesh.bacchewar@...el.com> wrote:
> On some Intel BXT platform, wake-up from suspend-to-idle on pressing 
> power-button is not working. Its noticed that gpio-keys driver marking 
> the second level IRQ/power-button as wake capable but Intel pintctrl 
> driver is missing to mark GPIO chip/controller IRQ which first level 
> IRQ as wake cable if its GPIO pin IRQ is wakeble. So, though the first 
> level IRQ gets generated on power-button press, since it is not marked 
> as wake capable resume/wake-up flow is not happening.
> Intel pintctrl/GPIO driver need to mark GPIO chip/controller IRQ 
> (first level IRQ) as wake capable iff GPIO pin's IRQ (second level 
> IRQ) is marked as wake cable.

>         if (on)
> -               gpe_en |= BIT(gpp_offset);
> +               enable_irq_wake(pctrl->irq);
>         else
> -               gpe_en &= ~BIT(gpp_offset);
> -       writel(gpe_en, community->regs + GPI_GPE_EN + gpp * 4);
> -
> -       raw_spin_unlock_irqrestore(&pctrl->lock, flags);
> +               disable_irq_wake(pctrl->irq);

Shouldn't be refcounting here or I missed something?
What I think of is 2+ GPIO lines marked as wake capable IRQ sources and one of them is disabled earlier by some reason.

--
With Best Regards,
Andy Shevchenko