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Date: Sun, 9 Oct 2016 19:53:39 -0500 From: Rob Herring <robh@...nel.org> To: Andrew Jeffery <andrew@...id.au> Cc: Linus Walleij <linus.walleij@...aro.org>, Joel Stanley <joel@....id.au>, Mark Rutland <mark.rutland@....com>, linux-gpio@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, openbmc@...ts.ozlabs.org Subject: Re: [PATCH 8/8] pinctrl: aspeed-g5: Add mux configuration for all pins On Wed, Sep 28, 2016 at 12:20:20AM +0930, Andrew Jeffery wrote: > The patch introducing the g5 pinctrl driver implemented a smattering of > pins to flesh out the implementation of the core and provide bare-bones > support for some OpenPOWER platforms and the AST2500 evaluation board. > Now, update the bindings document to reflect the complete functionality > and implement the necessary pin configuration tables in the driver. > > Signed-off-by: Andrew Jeffery <andrew@...id.au> > --- > Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 17 +- Acked-by: Rob Herring <robh@...nel.org> > drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 1476 ++++++- > drivers/pinctrl/aspeed/pinctrl-aspeed.h | 1 +- > 3 files changed, 1487 insertions(+), 7 deletions(-)
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