linux-kernel - Re: [PATCH v2] sdhci-esdhc-imx: Correct two register accesses

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Message-ID: <4e944cda-05c6-0515-c98d-e90600f63541@intel.com>
Date:   Tue, 11 Oct 2016 12:18:20 +0300
From:   Adrian Hunter <adrian.hunter@...el.com>
To:     Aaron Brice <aaron.brice@...asoft.com>, ulf.hansson@...aro.org,
        aisheng.dong@....com
Cc:     linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Dave Russell <david.russell@...asoft.com>
Subject: Re: [PATCH v2] sdhci-esdhc-imx: Correct two register accesses

On 10/10/16 21:39, Aaron Brice wrote:
>  - The DMA error interrupt bit is in a different position as
>    compared to the sdhci standard.  This is accounted for in
>    many cases, but not handled in the case of clearing the
>    INT_STATUS register by writing a 1 to that location.
>  - The HOST_CONTROL register is very different as compared to
>    the sdhci standard.  This is accounted for in the write
>    case, but not when read back out (which it is in the sdhci
>    code).
> 
> Signed-off-by: Dave Russell <david.russell@...asoft.com>
> Signed-off-by: Aaron Brice <aaron.brice@...asoft.com>
> Acked-by: Dong Aisheng <aisheng.dong@....com>

Acked-by: Adrian Hunter <adrian.hunter@...el.com>