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Message-Id: <WM!8ae38b052eee9a42a4712d13aee34e2d793055d4125e98cc2c03451811f33168b3556d3bf52ee5ba8dda879cea808cdc!@dg.advantech.com>
Date: Tue, 11 Oct 2016 10:49:33 -0700
From: "Ken.Lin" <ken.lin@...antech.com>
To: Fabio Estevam <festevam@...il.com>
CC: "shawnguo@...nel.org" <shawnguo@...nel.org>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"sboyd@...eaurora.org" <sboyd@...eaurora.org>,
"mturquette@...libre.com" <mturquette@...libre.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Peter.Stretz" <peter.stretz@...antech.com>,
"Peter.Chiang" <peter.chiang@...antech.com>,
Akshay Bhat <akshay.bhat@...esys.com>,
Jason Moss <jason.moss@....com>,
"emil@...esaudio.com" <emil@...esaudio.com>
Subject: RE: The possible regression in kernel 4.8 - clk: imx: correct AV
PLL rate formula
Hi Fabio,
> -----Original Message-----
> From: Fabio Estevam [mailto:festevam@...il.com]
> Sent: Thursday, October 6, 2016 4:38 PM
> To: Ken.Lin
> Cc: shawnguo@...nel.org; kernel@...gutronix.de; sboyd@...eaurora.org;
> mturquette@...libre.com; linux-arm-kernel@...ts.infradead.org; linux-
> clk@...r.kernel.org; linux-kernel@...r.kernel.org; Peter.Stretz; Peter.Chiang;
> Akshay Bhat; Jason Moss; emil@...esaudio.com
> Subject: Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate
> formula
>
> Hi Ken,
>
> On Thu, Oct 6, 2016 at 8:26 PM, Ken.Lin <ken.lin@...antech.com> wrote:
> > Hi,
> >
> > We found a possible regression issue (not seen in kernel 4.7-stable), which has
> to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c
> when we did a DP test (1920x1080@60) with clock source PLL5.
> > The DP desired pixel clock (148.5MHz that is calculated from the input of PLL
> output frequency) would be correct again when we reverted this commit.
> > Could you please help check if the commit has the side effect since it would
> have impacts on our on-going project when it requires moving from kernel 4.7
> to kernel 4.8 or newer version?
> >
> > Please check the following URL for the details
> > https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_
> > imx_correct_VL_PLL_rate_formula.pdf?dl=0
>
> Do these patches from Emil fix the issue?
>
> http://www.spinics.net/lists/arm-kernel/msg535204.html
>
> and
>
> http://www.spinics.net/lists/arm-kernel/msg535203.html
>
> Thanks
With the patches applied, the pixel clock (148500000 required for 1920x1080@60) is correct as we checked in kernel 4.7 and the actual measurement result looked good as we expected.
I think the patches should fix the issue.
Ref: /sys/kernel/debug/clk/clk_summary
pll5 1 1 1039500000 0 0
pll5_bypass 1 1 1039500000 0 0
pll5_video 1 1 1039500000 0 0
pll5_post_div 1 1 519750000 0 0
pll5_video_div 2 2 519750000 0 0
ipu2_di1_pre_sel 0 0 519750000 0 0
ipu2_di1_pre 0 0 173250000 0 0
ipu2_di1_sel 0 0 173250000 0 0
ipu2_di1 0 0 173250000 0 0
ipu2_di0_pre_sel 0 0 519750000 0 0
ipu2_di0_pre 0 0 173250000 0 0
ldb_di1_sel 1 1 519750000 0 0
ldb_di1_div_3_5 1 1 148500000 0 0
ldb_di1_podf 1 1 148500000 0 0
ldb_di1 2 2 148500000 0 0
ipu2_di0_sel 1 1 148500000 0 0
ipu2_di0 1 1 148500000 0 0
ldb_di0_sel 1 1 519750000 0 0
ldb_di0_div_3_5 1 1 148500000 0 0
ldb_di0_podf 1 1 148500000 0 0
ldb_di0 1 1 148500000 0 0
Ref: kernel debug messages
[ 113.848959] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: mode->hdisplay: 1920
[ 113.857201] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: mode->vdisplay: 1080
[ 113.865421] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: attached to encoder types 0x8
[ 113.874483] imx-ipuv3 2800000.ipu: disp 0: panel size = 1920 x 1080
[ 113.880803] imx-ipuv3 2800000.ipu: Clocks: IPU 264000000Hz DI 75833334Hz Needed 148500000Hz
[ 113.889252] imx-ipuv3 2800000.ipu: Want 148500000Hz IPU 264000000Hz DI 75833334Hz using DI, 75833334Hz
[ 113.898768] imx-ldb 2000000.aips-bus:ldb@...e0008: imx_ldb_set_clock: now: 227500000 want: 519750000
[ 113.908018] imx-ldb 2000000.aips-bus:ldb@...e0008: imx_ldb_set_clock after: 519750000
[ 113.915886] imx-ldb 2000000.aips-bus:ldb@...e0008: imx_ldb_set_clock: now: 148500000 want: 148500000
[ 113.925050] imx-ldb 2000000.aips-bus:ldb@...e0008: imx_ldb_set_clock after: 148500000
[ 113.932928] imx-ldb 2000000.aips-bus:ldb@...e0008: imx_ldb_set_clock: now: 519750000 want: 519750000
[ 113.942096] imx-ldb 2000000.aips-bus:ldb@...e0008: imx_ldb_set_clock after: 519750000
[ 113.949938] imx-ldb 2000000.aips-bus:ldb@...e0008: imx_ldb_set_clock: now: 148500000 want: 148500000
[ 113.959104] imx-ldb 2000000.aips-bus:ldb@...e0008: imx_ldb_set_clock after: 148500000
>
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