linux-kernel - Re: [PATCH] clk: meson-gxbb: Export PWM related clocks for DT

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Message-ID: <147285925618.69079.14195001640916253279@resonance>
Date:   Fri, 02 Sep 2016 16:34:16 -0700
From:   Michael Turquette <mturquette@...libre.com>
To:     Neil Armstrong <narmstrong@...libre.com>, sboyd@...eaurora.org,
        carlo@...one.org, khilman@...libre.com, devicetree@...r.kernel.org
Cc:     "Neil Armstrong" <narmstrong@...libre.com>,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: meson-gxbb: Export PWM related clocks for DT

Quoting Neil Armstrong (2016-08-22 05:49:37)
> Add the PWM related clocks in order to be referenced as PWM source
> clocks.
> 
> Signed-off-by: Neil Armstrong <narmstrong@...libre.com>

Applied.

Regards,
Mike

> ---
>  drivers/clk/meson/gxbb.h              | 6 +++---
>  include/dt-bindings/clock/gxbb-clkc.h | 3 +++
>  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
> index a2adf34..523b494 100644
> --- a/drivers/clk/meson/gxbb.h
> +++ b/drivers/clk/meson/gxbb.h
> @@ -170,11 +170,11 @@
>   */
>  #define CLKID_SYS_PLL            0
>  /* CLKID_CPUCLK */
> -#define CLKID_HDMI_PLL           2
> +/* CLKID_HDMI_PLL */
>  #define CLKID_FIXED_PLL                  3
>  #define CLKID_FCLK_DIV2                  4
> -#define CLKID_FCLK_DIV3                  5
> -#define CLKID_FCLK_DIV4                  6
> +/* CLKID_FCLK_DIV3 */
> +/* CLKID_FCLK_DIV4 */
>  #define CLKID_FCLK_DIV5                  7
>  #define CLKID_FCLK_DIV7                  8
>  #define CLKID_GP0_PLL            9
> diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
> index f889d80..a5897f3 100644
> --- a/include/dt-bindings/clock/gxbb-clkc.h
> +++ b/include/dt-bindings/clock/gxbb-clkc.h
> @@ -6,6 +6,9 @@
>  #define __GXBB_CLKC_H
>  
>  #define CLKID_CPUCLK           1
> +#define CLKID_HDMI_PLL         2
> +#define CLKID_FCLK_DIV3                5
> +#define CLKID_FCLK_DIV4                6
>  #define CLKID_CLK81            12
>  #define CLKID_ETH              36
>  
> -- 
> 1.9.1
> 
> --
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