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Message-ID: <1476391230.2478.44.camel@intel.com>
Date: Thu, 13 Oct 2016 17:40:30 -0300
From: Paulo Zanoni <paulo.r.zanoni@...el.com>
To: Lyude <cpaul@...hat.com>, intel-gfx@...ts.freedesktop.org
Cc: Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Ville Syrjälä
<ville.syrjala@...ux.intel.com>,
Daniel Vetter <daniel.vetter@...el.com>,
Jani Nikula <jani.nikula@...ux.intel.com>,
David Airlie <airlied@...ux.ie>,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 08/10] drm/i915/gen9: Add skl_wm_level_equals()
Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> Helper we're going to be using for implementing verification of the
> wm
> levels in skl_verify_wm_level().
>
> Signed-off-by: Lyude <cpaul@...hat.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@...el.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@...ux.intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@...el.com>
> ---
> drivers/gpu/drm/i915/intel_drv.h | 2 ++
> drivers/gpu/drm/i915/intel_pm.c | 14 ++++++++++++++
> 2 files changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 73a2d16d..3e6e9af 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1761,6 +1761,8 @@ void skl_pipe_wm_get_hw_state(struct drm_crtc
> *crtc,
> bool intel_can_enable_sagv(struct drm_atomic_state *state);
> int intel_enable_sagv(struct drm_i915_private *dev_priv);
> int intel_disable_sagv(struct drm_i915_private *dev_priv);
> +bool skl_wm_level_equals(const struct skl_wm_level *l1,
> + const struct skl_wm_level *l2);
> bool skl_ddb_allocation_equals(const struct skl_ddb_allocation *old,
> const struct skl_ddb_allocation *new,
> enum pipe pipe);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 27a520ce..6af1587 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3853,6 +3853,20 @@ void skl_write_cursor_wm(struct intel_crtc
> *intel_crtc,
> &ddb->plane[pipe][PLANE_CURSOR]);
> }
>
> +bool skl_wm_level_equals(const struct skl_wm_level *l1,
> + const struct skl_wm_level *l2)
> +{
> + if (l1->plane_en != l2->plane_en)
> + return false;
> +
> + /* If both planes aren't enabled, the rest shouldn't matter
> */
> + if (!l1->plane_en)
> + return true;
> +
> + return (l1->plane_res_l == l2->plane_res_l &&
> + l1->plane_res_b == l2->plane_res_b);
> +}
> +
> static inline bool skl_ddb_entries_overlap(const struct
> skl_ddb_entry *a,
> const struct
> skl_ddb_entry *b)
> {
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