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Message-ID: <770436977.3704467.1476471398385.JavaMail.zimbra@redhat.com>
Date: Fri, 14 Oct 2016 14:56:38 -0400 (EDT)
From: Paolo Bonzini <pbonzini@...hat.com>
To: Nadav Amit <nadav.amit@...il.com>
Cc: LKML <linux-kernel@...r.kernel.org>, KVM <kvm@...r.kernel.org>,
Radim Krčmář <rkrcmar@...hat.com>,
Yang Zhang <yang.zhang.wz@...il.com>,
feng wu <feng.wu@...el.com>, mst@...hat.com
Subject: Re: [PATCH 1/5] KVM: x86: avoid atomic operations on APICv vmentry
> > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> > index 23b99f305382..63a442aefc12 100644
> > --- a/arch/x86/kvm/lapic.c
> > +++ b/arch/x86/kvm/lapic.c
> > @@ -342,9 +342,11 @@ void __kvm_apic_update_irr(u32 *pir, void *regs)
> > u32 i, pir_val;
> >
> > for (i = 0; i <= 7; i++) {
> > - pir_val = xchg(&pir[i], 0);
> > - if (pir_val)
> > + pir_val = READ_ONCE(pir[i]);
>
> Out of curiosity, do you really need this READ_ONCE?
The answer can only be "depends on the compiler's whims". :)
If you think of READ_ONCE as a C11 relaxed atomic load, then yes.
Paolo
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