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Message-ID: <8520D5D51A55D047800579B0941471982594B127@XAP-PVEXMBX01.xlnx.xilinx.com>
Date: Sat, 15 Oct 2016 13:30:13 +0000
From: Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
To: Marc Zyngier <marc.zyngier@....com>
CC: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Bjorn Helgaas <helgaas@...nel.org>,
"arnd@...db.de" <arnd@...db.de>
Subject: RE: Why MSI is limited to 32 interrupts maximum
> On Sat, 15 Oct 2016 12:37:55 +0000
> Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com> wrote:
>
> Hi Bharat,
>
> > Can anyone tell why MSI interrupts are limited to maximum 32
> > interrupts, even though we have 16bit message data register ?
>
> That's the very definition of the original PCI MSI: Up to 32 consecutive interrupts
> per function, and a single doorbell address.
> MSI-X lifts that restriction and offers up to 2048 interrupts that do not have to
> be contiguous can target individual doorbells. Assuming your MSI controller
> advertises MSI-X support and that your devices do support it as well, you'll be
> able to enjoy those.
>
Thanks Marc, so then only 5 bits of message data register will be used, so what is the purpose rest of the bits ?
> >
> > Regards,
> > Bharat
> >
> >
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> Please fix your email not to carry such disclaimer (or use a private email address
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> Thanks,
>
> M.
> --
> Without deviation from the norm, progress is not possible.
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