linux-kernel - [tip:x86/urgent] perf/x86/intel: Add Knights Mill CPUID

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Message-ID: <tip-d673b8340cac02d02de30197d6fe66c22a1df6e4@git.kernel.org>
Date:   Sun, 16 Oct 2016 04:22:54 -0700
From:   tip-bot for Piotr Luc <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     torvalds@...ux-foundation.org, peterz@...radead.org,
        luto@...nel.org, dvlasenk@...hat.com, linux-kernel@...r.kernel.org,
        dave.hansen@...el.com, brgerst@...il.com, tglx@...utronix.de,
        piotr.luc@...el.com, mingo@...nel.org, jpoimboe@...hat.com,
        hpa@...or.com, bp@...en8.de
Subject: [tip:x86/urgent] perf/x86/intel: Add Knights Mill CPUID

Commit-ID:  d673b8340cac02d02de30197d6fe66c22a1df6e4
Gitweb:     http://git.kernel.org/tip/d673b8340cac02d02de30197d6fe66c22a1df6e4
Author:     Piotr Luc <piotr.luc@...el.com>
AuthorDate: Wed, 12 Oct 2016 20:26:34 +0200
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Sun, 16 Oct 2016 11:32:11 +0200

perf/x86/intel: Add Knights Mill CPUID

Add Knights Mill (KNM) to the list of CPUIDs supported by PMU.

Signed-off-by: Piotr Luc <piotr.luc@...el.com>
Reviewed-by: Dave Hansen <dave.hansen@...el.com>
Cc: Andy Lutomirski <luto@...nel.org>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Brian Gerst <brgerst@...il.com>
Cc: Denys Vlasenko <dvlasenk@...hat.com>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Josh Poimboeuf <jpoimboe@...hat.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Link: http://lkml.kernel.org/r/20161012182634.2462-1-piotr.luc@intel.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/events/intel/core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index a3a9eb8..eab0915 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3898,6 +3898,7 @@ __init int intel_pmu_init(void)
 		break;
 
 	case INTEL_FAM6_XEON_PHI_KNL:
+	case INTEL_FAM6_XEON_PHI_KNM:
 		memcpy(hw_cache_event_ids,
 		       slm_hw_cache_event_ids, sizeof(hw_cache_event_ids));
 		memcpy(hw_cache_extra_regs,
@@ -3912,7 +3913,7 @@ __init int intel_pmu_init(void)
 		x86_pmu.flags |= PMU_FL_HAS_RSP_1;
 		x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
 
-		pr_cont("Knights Landing events, ");
+		pr_cont("Knights Landing/Mill events, ");
 		break;
 
 	case INTEL_FAM6_SKYLAKE_MOBILE: