[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <alpine.DEB.2.20.1610171257451.4912@nanos>
Date: Mon, 17 Oct 2016 13:03:01 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Fenghua Yu <fenghua.yu@...el.com>
cc: "H. Peter Anvin" <h.peter.anvin@...el.com>,
Ingo Molnar <mingo@...e.hu>, Tony Luck <tony.luck@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
Stephane Eranian <eranian@...gle.com>,
Borislav Petkov <bp@...e.de>,
Dave Hansen <dave.hansen@...el.com>,
Nilay Vaish <nilayvaish@...il.com>, Shaohua Li <shli@...com>,
David Carrillo-Cisneros <davidcc@...gle.com>,
Ravi V Shankar <ravi.v.shankar@...el.com>,
Sai Prakhya <sai.praneeth.prakhya@...el.com>,
Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
linux-kernel <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>
Subject: Re: [PATCH v4 07/18] x86/intel_rdt: Add Haswell feature discovery
On Fri, 14 Oct 2016, Fenghua Yu wrote:
> +static inline bool cache_alloc_hsw_probe(void)
> +{
> + u32 l, h;
> + u32 max_cbm = BIT_MASK(20) - 1;
Two options here:
+ u32 l, h, max_cbm = BIT_MASK(20) - 1;
or
+ u32 max_cbm = BIT_MASK(20) - 1;
+ u32 l, h;
I personally prefer #1, but I can accept #2 as well. Both are quick to
parse while the one you chose is stopping the reading flow.
> +
> + if (wrmsr_safe(IA32_L3_CBM_BASE, max_cbm, 0))
> + return false;
> + rdmsr(IA32_L3_CBM_BASE, l, h);
> + if (l != max_cbm)
> + return false;
> +
> + return true;
return l == max_cbm;
Hmm?
> +}
> +
> static inline bool get_rdt_resources(void)
> {
> bool ret = false;
>
> + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
> + boot_cpu_data.x86 == 6 &&
> + boot_cpu_data.x86_model == INTEL_FAM6_HASWELL_X)
> + return cache_alloc_hsw_probe();
Can you please stick that model check into the probe function and do:
if (cache_alloc_hsw_probe())
return true;
> +
> if (!boot_cpu_has(X86_FEATURE_RDT_A))
> return false;
> if (boot_cpu_has(X86_FEATURE_CAT_L3))
Thanks,
tglx
Powered by blists - more mailing lists