linux-kernel - [PATCH v7 REPOST 3/9] arm, dts: add TC2 cpu capacity-dmips-mhz information

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Message-Id: <20161017154650.18779-4-juri.lelli@arm.com>
Date:   Mon, 17 Oct 2016 16:46:44 +0100
From:   Juri Lelli <juri.lelli@....com>
To:     linux-kernel@...r.kernel.org
Cc:     linux-pm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org, peterz@...radead.org,
        vincent.guittot@...aro.org, robh+dt@...nel.org,
        mark.rutland@....com, linux@....linux.org.uk, sudeep.holla@....com,
        lorenzo.pieralisi@....com, catalin.marinas@....com,
        will.deacon@....com, morten.rasmussen@....com,
        dietmar.eggemann@....com, juri.lelli@....com, broonie@...nel.org,
        Liviu Dudau <liviu.dudau@....com>,
        Pawel Moll <pawel.moll@....com>,
        Ian Campbell <ijc+devicetree@...lion.org.uk>,
        Kumar Gala <galak@...eaurora.org>
Subject: [PATCH v7 REPOST 3/9] arm, dts: add TC2 cpu capacity-dmips-mhz information

Add TC2 cpu capacity information.

Cc: Liviu Dudau <liviu.dudau@....com>
Cc: Sudeep Holla <sudeep.holla@....com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Pawel Moll <pawel.moll@....com>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Ian Campbell <ijc+devicetree@...lion.org.uk>
Cc: Kumar Gala <galak@...eaurora.org>
Cc: Russell King <linux@....linux.org.uk>
Cc: devicetree@...r.kernel.org
Signed-off-by: Juri Lelli <juri.lelli@....com>
Acked-by: Sudeep Holla <sudeep.holla@....com>
---

Changes from v1:
  - capacity-scale removed

Changes from v4:
  - binding changed to capacity-dmips-mhz

Changes from v6:
  - s/binding// in changelog
---
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 0205c97efdef..45d08cc37b01 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -39,6 +39,7 @@
 			reg = <0>;
 			cci-control-port = <&cci_control1>;
 			cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
+			capacity-dmips-mhz = <1024>;
 		};
 
 		cpu1: cpu@1 {
@@ -47,6 +48,7 @@
 			reg = <1>;
 			cci-control-port = <&cci_control1>;
 			cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
+			capacity-dmips-mhz = <1024>;
 		};
 
 		cpu2: cpu@2 {
@@ -55,6 +57,7 @@
 			reg = <0x100>;
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+			capacity-dmips-mhz = <516>;
 		};
 
 		cpu3: cpu@3 {
@@ -63,6 +66,7 @@
 			reg = <0x101>;
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+			capacity-dmips-mhz = <516>;
 		};
 
 		cpu4: cpu@4 {
@@ -71,6 +75,7 @@
 			reg = <0x102>;
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
+			capacity-dmips-mhz = <516>;
 		};
 
 		idle-states {
-- 
2.10.0