lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <DB6PR0401MB263101EAFD080C2BA06F6E02ECD20@DB6PR0401MB2631.eurprd04.prod.outlook.com>
Date:   Wed, 19 Oct 2016 09:35:36 +0000
From:   Meng Yi <meng.yi@....com>
To:     Stefan Agner <stefan@...er.ch>,
        "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>
CC:     "alison.wang@...escale.com" <alison.wang@...escale.com>,
        "jianwei.wang.chn@...il.com" <jianwei.wang.chn@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 1/5] drm/fsl-dcu: enable TCON bypass mode by default


> 
> Do not use encoder disable/enable callbacks to control bypass mode as this
> seems to mess with the signals not liked by displays. This also makes more
> sense since the encoder is already defined to be parallel RGB/LVDS at creation
> time.
> 
> Signed-off-by: Stefan Agner <stefan@...er.ch>
> ---
>  drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c |  2 ++  drivers/gpu/drm/fsl-
> dcu/fsl_dcu_drm_rgb.c | 39 ++++---------------------------
>  2 files changed, 7 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-
> dcu/fsl_dcu_drm_drv.c
> index 0884c45..3897f56 100644
> --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
> +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
> @@ -273,6 +273,8 @@ static int fsl_dcu_drm_pm_resume(struct device *dev)
>  		goto disable_dcu_clk;
>  	}
> 
> +	if (fsl_dev->tcon)
> +		fsl_tcon_bypass_enable(fsl_dev->tcon);
>  	fsl_dcu_drm_init_planes(fsl_dev->drm);
>  	drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state);
> 
> diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c b/drivers/gpu/drm/fsl-
> dcu/fsl_dcu_drm_rgb.c
> index 26edcc8..e1dd75b 100644
> --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
> +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
> @@ -20,38 +20,6 @@
>  #include "fsl_dcu_drm_drv.h"
>  #include "fsl_tcon.h"
> 
> -static int
> -fsl_dcu_drm_encoder_atomic_check(struct drm_encoder *encoder,
> -				 struct drm_crtc_state *crtc_state,
> -				 struct drm_connector_state *conn_state)
> -{
> -	return 0;
> -}
> -
> -static void fsl_dcu_drm_encoder_disable(struct drm_encoder *encoder) -{
> -	struct drm_device *dev = encoder->dev;
> -	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
> -
> -	if (fsl_dev->tcon)
> -		fsl_tcon_bypass_disable(fsl_dev->tcon);
> -}
> -
> -static void fsl_dcu_drm_encoder_enable(struct drm_encoder *encoder) -{
> -	struct drm_device *dev = encoder->dev;
> -	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
> -
> -	if (fsl_dev->tcon)
> -		fsl_tcon_bypass_enable(fsl_dev->tcon);
> -}
> -
> -static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
> -	.atomic_check = fsl_dcu_drm_encoder_atomic_check,
> -	.disable = fsl_dcu_drm_encoder_disable,
> -	.enable = fsl_dcu_drm_encoder_enable,
> -};
> -
>  static void fsl_dcu_drm_encoder_destroy(struct drm_encoder *encoder)  {
>  	drm_encoder_cleanup(encoder);
> @@ -68,13 +36,16 @@ int fsl_dcu_drm_encoder_create(struct
> fsl_dcu_drm_device *fsl_dev,
>  	int ret;
> 
>  	encoder->possible_crtcs = 1;
> +
> +	/* Use bypass mode for parallel RGB/LVDS encoder */
> +	if (fsl_dev->tcon)
> +		fsl_tcon_bypass_enable(fsl_dev->tcon);
> +
>  	ret = drm_encoder_init(fsl_dev->drm, encoder, &encoder_funcs,
>  			       DRM_MODE_ENCODER_LVDS, NULL);
>  	if (ret < 0)
>  		return ret;
> 
> -	drm_encoder_helper_add(encoder, &encoder_helper_funcs);
> -
>  	return 0;
>  }
> 
> --
> 2.10.0

Tested-By: Meng Yi <meng.yi@....com>

Tested those 5 patches on LS1021a-twr, and everything is fine.

Meng

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ