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Message-Id: <b62c8661eb3c2d72e61511794a3ab1b43f005805.1476951078.git-series.maxime.ripard@free-electrons.com>
Date:   Thu, 20 Oct 2016 10:12:44 +0200
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Boris Brezillon <boris.brezillon@...e-electrons.com>,
        Chen-Yu Tsai <wens@...e.org>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc:     Brian Norris <computersforpeace@...il.com>,
        Richard Weinberger <richard@....at>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mtd@...ts.infradead.org,
        Mylene Josserand <mylene.josserand@...e-electrons.com>,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Subject: [PATCH 3/8] ARM: gr8: Add the UART3

The GR8 has access to the UART3 controller, which was missing in the
DTSI. Add it.

Signed-off-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
---
 arch/arm/boot/dts/ntc-gr8.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/ntc-gr8.dtsi b/arch/arm/boot/dts/ntc-gr8.dtsi
index ca54e03ef366..d7cf6be2549c 100644
--- a/arch/arm/boot/dts/ntc-gr8.dtsi
+++ b/arch/arm/boot/dts/ntc-gr8.dtsi
@@ -978,6 +978,16 @@
 			status = "disabled";
 		};
 
+		uart3: serial@...28c00 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x01c28c00 0x400>;
+			interrupts = <4>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&apb1_gates 19>;
+			status = "disabled";
+		};
+
 		i2c0: i2c@...2ac00 {
 			compatible = "allwinner,sun4i-a10-i2c";
 			reg = <0x01c2ac00 0x400>;
-- 
git-series 0.8.10

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