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Message-ID: <CACRpkdZ=mWYJpBV_WmxYcAwA5TdHM4qv9k17Jb6TnoOL4YAPHA@mail.gmail.com>
Date:   Fri, 21 Oct 2016 10:59:25 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Pantelis Antoniou <pantelis.antoniou@...sulko.com>
Cc:     Lee Jones <lee.jones@...aro.org>,
        Alexandre Courbot <gnurou@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Frank Rowand <frowand.list@...il.com>,
        Wolfram Sang <wsa@...-dreams.de>,
        Richard Purdie <rpurdie@...ys.net>,
        Jacek Anaszewski <j.anaszewski@...sung.com>,
        Jean Delvare <jdelvare@...e.com>,
        Peter Rosin <peda@...ntia.se>,
        Avirup Banerjee <abanerjee@...iper.net>,
        Georgi Vlaev <gvlaev@...iper.net>,
        Guenter Roeck <linux@...ck-us.net>,
        JawaharBalaji Thirumalaisamy <jawaharb@...iper.net>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
        "linux-leds@...r.kernel.org" <linux-leds@...r.kernel.org>,
        linux-hwmon@...r.kernel.org
Subject: Re: [PATCH 06/10] gpio: gpio-i2cs: Document bindings of I2CS FPGA
 GPIO block

On Fri, Oct 7, 2016 at 5:21 PM, Pantelis Antoniou
<pantelis.antoniou@...sulko.com> wrote:

> +This is virtual gpio driver, that maps each bit of the I2CS FPGA to
> +a gpio. It's used as a compatibility replacement for FRUs that use
> +I2CS FPGA to report presence, control and report power status in
> +the Juniper's driver infra that uses gpios. Compatible with any I2CS.

What does "virtual" mean?

I regularly NACK patches that try to shoehorn stuff into
GPIO not because they are actually GPIO hardware drivers or
general purpose at all, but because it is convenient. Don't do this.

> +- i2c-gpio-map: Map of "I2CS register" and "direction". The registers
> +       are 8 bit wide, each bit of the register is mapped to either
> +       input or output depending on the bits of the "direction". If
> +       the bit in the direction is 1, then that bit from the I2CS
> +       register is mapped to gpio input, otherwise to gpio output.

Does this mean that the hardware is synthesized so that some lines
are hardwired as input and some hardwired as output?

That again does not sound like "general purpose" at all.

I think this happens in other hardware and should be a generic
binding like

gpio-lines-input-only = <0>, <4>;
gpio-lines-output-only = <7>, <8>;

And no bitmasking, use the local offset, parse and construct the
mask.

Yours,
Linus Walleij

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