linux-kernel - [tip:perf/core] perf c2c report: Add dram related sort keys

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Message-ID: <tip-tl3qqi9ehk6g1fla4z7y0ykd@git.kernel.org>
Date:   Sat, 22 Oct 2016 01:43:33 -0700
From:   tip-bot for Jiri Olsa <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     acme@...hat.com, a.p.zijlstra@...llo.nl, namhyung@...nel.org,
        dzickus@...hat.com, tglx@...utronix.de, dsahern@...il.com,
        andi@...stfloor.org, jmario@...hat.com,
        linux-kernel@...r.kernel.org, hpa@...or.com, jolsa@...nel.org,
        mingo@...nel.org
Subject: [tip:perf/core] perf c2c report: Add dram related sort keys

Commit-ID:  6c70f54cf7dcd1cfd7a2f6bf179bd36eafc14a61
Gitweb:     http://git.kernel.org/tip/6c70f54cf7dcd1cfd7a2f6bf179bd36eafc14a61
Author:     Jiri Olsa <jolsa@...nel.org>
AuthorDate: Sat, 28 May 2016 12:30:13 +0200
Committer:  Arnaldo Carvalho de Melo <acme@...hat.com>
CommitDate: Wed, 19 Oct 2016 13:18:31 -0300

perf c2c report: Add dram related sort keys

They are to be displayed in the main cachelines overall output:

  dram_lcl, dram_rmt

They display DRAM rmt/lcl access numbers for specific cacheline.

Signed-off-by: Jiri Olsa <jolsa@...nel.org>
Cc: Andi Kleen <andi@...stfloor.org>
Cc: David Ahern <dsahern@...il.com>
Cc: Don Zickus <dzickus@...hat.com>
Cc: Joe Mario <jmario@...hat.com>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Link: http://lkml.kernel.org/n/tip-tl3qqi9ehk6g1fla4z7y0ykd@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
---
 tools/perf/builtin-c2c.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
index bf4859f..c718d8b 100644
--- a/tools/perf/builtin-c2c.c
+++ b/tools/perf/builtin-c2c.c
@@ -807,6 +807,9 @@ percent_stores_l1miss_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
 	return per_left - per_right;
 }
 
+STAT_FN(lcl_dram)
+STAT_FN(rmt_dram)
+
 #define HEADER_LOW(__h)			\
 	{				\
 		.line[1] = {		\
@@ -1055,6 +1058,22 @@ static struct c2c_dimension dim_percent_stores_l1miss = {
 	.width		= 7,
 };
 
+static struct c2c_dimension dim_dram_lcl = {
+	.header		= HEADER_SPAN("--- Load Dram ----", "Lcl", 1),
+	.name		= "dram_lcl",
+	.cmp		= lcl_dram_cmp,
+	.entry		= lcl_dram_entry,
+	.width		= 8,
+};
+
+static struct c2c_dimension dim_dram_rmt = {
+	.header		= HEADER_SPAN_LOW("Rmt"),
+	.name		= "dram_rmt",
+	.cmp		= rmt_dram_cmp,
+	.entry		= rmt_dram_entry,
+	.width		= 8,
+};
+
 static struct c2c_dimension *dimensions[] = {
 	&dim_dcacheline,
 	&dim_offset,
@@ -1082,6 +1101,8 @@ static struct c2c_dimension *dimensions[] = {
 	&dim_percent_lcl_hitm,
 	&dim_percent_stores_l1hit,
 	&dim_percent_stores_l1miss,
+	&dim_dram_lcl,
+	&dim_dram_rmt,
 	NULL,
 };