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Message-ID: <tip-0rclftliywdq9qr2sjbugb6b@git.kernel.org>
Date:   Sat, 22 Oct 2016 01:48:45 -0700
From:   tip-bot for Jiri Olsa <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     dsahern@...il.com, andi@...stfloor.org, tglx@...utronix.de,
        mingo@...nel.org, acme@...hat.com, hpa@...or.com,
        dzickus@...hat.com, linux-kernel@...r.kernel.org,
        jmario@...hat.com, a.p.zijlstra@...llo.nl, namhyung@...nel.org,
        jolsa@...nel.org
Subject: [tip:perf/core] perf c2c report: Set final resort fields

Commit-ID:  22dd59d1457408b69a95e2b5487a500f39d3c409
Gitweb:     http://git.kernel.org/tip/22dd59d1457408b69a95e2b5487a500f39d3c409
Author:     Jiri Olsa <jolsa@...nel.org>
AuthorDate: Tue, 10 May 2016 14:08:29 +0200
Committer:  Arnaldo Carvalho de Melo <acme@...hat.com>
CommitDate: Wed, 19 Oct 2016 13:18:31 -0300

perf c2c report: Set final resort fields

Set resort/display fields for both cachelines and single cacheline
displays.

Cachelines are sorted on:

  rmt_hitm

will be made configurable in following patches.

Following fields are display for cachelines:

  dcacheline
  tot_recs
  percent_hitm
  tot_hitm,lcl_hitm,rmt_hitm
  stores,stores_l1hit,stores_l1miss
  dram_lcl,dram_rmt
  ld_llcmiss
  tot_loads
  ld_fbhit,ld_l1hit,ld_l2hit
  ld_lclhit,ld_rmthit

The single cacheline is sort by:

  offset,rmt_hitm,lcl_hitm

will be made configurable in following patches.

Following fields are display for each cacheline:

  percent_rmt_hitm
  percent_lcl_hitm
  percent_stores_l1hit
  percent_stores_l1miss
  offset
  pid
  tid
  mean_rmt
  mean_lcl
  mean_load
  cpucnt
  symbol
  dso
  node

Signed-off-by: Jiri Olsa <jolsa@...nel.org>
Cc: Andi Kleen <andi@...stfloor.org>
Cc: David Ahern <dsahern@...il.com>
Cc: Don Zickus <dzickus@...hat.com>
Cc: Joe Mario <jmario@...hat.com>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Link: http://lkml.kernel.org/n/tip-0rclftliywdq9qr2sjbugb6b@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
---
 tools/perf/builtin-c2c.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
index 44a8567..c271261 100644
--- a/tools/perf/builtin-c2c.c
+++ b/tools/perf/builtin-c2c.c
@@ -1637,6 +1637,23 @@ static int resort_cl_cb(struct hist_entry *he)
 	c2c_hists = c2c_he->hists;
 
 	if (c2c_hists) {
+		c2c_hists__reinit(c2c_hists,
+			"percent_rmt_hitm,"
+			"percent_lcl_hitm,"
+			"percent_stores_l1hit,"
+			"percent_stores_l1miss,"
+			"offset,"
+			"pid,"
+			"tid,"
+			"mean_rmt,"
+			"mean_lcl,"
+			"mean_load,"
+			"cpucnt,"
+			"symbol,"
+			"dso,"
+			"node",
+			"offset,rmt_hitm,lcl_hitm");
+
 		hists__collapse_resort(&c2c_hists->hists, NULL);
 		hists__output_resort_cb(&c2c_hists->hists, NULL, filter_cb);
 	}
@@ -1768,6 +1785,20 @@ static int perf_c2c__report(int argc, const char **argv)
 		goto out_session;
 	}
 
+	c2c_hists__reinit(&c2c.hists,
+			"dcacheline,"
+			"tot_recs,"
+			"percent_hitm,"
+			"tot_hitm,lcl_hitm,rmt_hitm,"
+			"stores,stores_l1hit,stores_l1miss,"
+			"dram_lcl,dram_rmt,"
+			"ld_llcmiss,"
+			"tot_loads,"
+			"ld_fbhit,ld_l1hit,ld_l2hit,"
+			"ld_lclhit,ld_rmthit",
+			"rmt_hitm"
+			);
+
 	ui_progress__init(&prog, c2c.hists.hists.nr_entries, "Sorting...");
 
 	hists__collapse_resort(&c2c.hists.hists, NULL);

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