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Message-Id: <1477304297-5248-1-git-send-email-sricharan@codeaurora.org>
Date:   Mon, 24 Oct 2016 15:48:14 +0530
From:   Sricharan R <sricharan@...eaurora.org>
To:     sboyd@...eaurora.org, mturquette@...libre.com,
        linux-clk@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, rnayak@...eaurora.org,
        stanimir.varbanov@...aro.org
Cc:     sricharan@...eaurora.org
Subject: [PATCH 0/3] clk: qcom: Add support for hw controlled gdscs/clocks

This series adds support for gdscs(powerdomains) that can be configured
in hw controlled mode. So they are turned 'ON' based on needs dynamically,
helping to save power. Also updated the venus video ip's gdsc/clock
data to put them in hw control.

Rajendra Nayak (1):
  clk: qcom: gdsc: Add support for gdscs with HW control

Sricharan R (2):
  clk: qcom: Put venus core0/1 gdscs to hw control mode
  clk: qcom: Set BRANCH_HALT_DELAY flags for venus core0/1 clks

 drivers/clk/qcom/gdsc.c         | 15 +++++++++++++++
 drivers/clk/qcom/gdsc.h         |  1 +
 drivers/clk/qcom/mmcc-msm8996.c |  4 ++++
 3 files changed, 20 insertions(+)

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

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