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Message-ID: <1477625554-46700-2-git-send-email-yangbo.lu@nxp.com>
Date: Fri, 28 Oct 2016 11:32:27 +0800
From: Yangbo Lu <yangbo.lu@....com>
To: <linux-mmc@...r.kernel.org>, <ulf.hansson@...aro.org>,
Scott Wood <oss@...error.net>, Arnd Bergmann <arnd@...db.de>
CC: <linuxppc-dev@...ts.ozlabs.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-i2c@...r.kernel.org>, <iommu@...ts.linux-foundation.org>,
<netdev@...r.kernel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>,
Russell King <linux@....linux.org.uk>,
Jochen Friedrich <jochen@...am.de>,
Joerg Roedel <joro@...tes.org>,
Claudiu Manoil <claudiu.manoil@...escale.com>,
Bhupesh Sharma <bhupesh.sharma@...escale.com>,
Qiang Zhao <qiang.zhao@....com>,
Kumar Gala <galak@...eaurora.org>,
Santosh Shilimkar <ssantosh@...nel.org>,
Leo Li <leoyang.li@....com>, Xiaobo Xie <xiaobo.xie@....com>,
Minghuan Lian <minghuan.lian@....com>,
Yangbo Lu <yangbo.lu@....com>
Subject: [v13, 1/8] dt: bindings: update Freescale DCFG compatible
Update Freescale DCFG compatible with 'fsl,<chip>-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a,
ls1043a, and ls2080a.
Signed-off-by: Yangbo Lu <yangbo.lu@....com>
Acked-by: Rob Herring <robh@...nel.org>
Signed-off-by: Scott Wood <oss@...error.net>
---
Changes for v8:
- Added this patch
Changes for v9:
- Added a list for the possible compatibles
Changes for v10:
- None
Changes for v11:
- Added 'Acked-by: Rob Herring'
- Updated commit message by Scott
Changes for v12:
- None
Changes for v13:
- None
---
Documentation/devicetree/bindings/arm/fsl.txt | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index dbbc095..713c1ae 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -119,7 +119,11 @@ Freescale DCFG
configuration and status for the device. Such as setting the secondary
core start address and release the secondary core from holdoff and startup.
Required properties:
- - compatible: should be "fsl,ls1021a-dcfg"
+ - compatible: should be "fsl,<chip>-dcfg"
+ Possible compatibles:
+ "fsl,ls1021a-dcfg"
+ "fsl,ls1043a-dcfg"
+ "fsl,ls2080a-dcfg"
- reg : should contain base address and length of DCFG memory-mapped registers
Example:
--
2.1.0.27.g96db324
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