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Message-ID: <20161101071743.ef3nhdhaquhbgtlo@pengutronix.de>
Date: Tue, 1 Nov 2016 08:17:43 +0100
From: Sascha Hauer <s.hauer@...gutronix.de>
To: Lukasz Majewski <l.majewski@...ess.pl>
Cc: Boris Brezillon <boris.brezillon@...e-electrons.com>,
linux-pwm@...r.kernel.org,
Bhuvanchandra DV <bhuvanchandra.dv@...adex.com>,
linux-kernel@...r.kernel.org, Stefan Agner <stefan@...er.ch>,
Thierry Reding <thierry.reding@...il.com>,
kernel@...gutronix.de, Fabio Estevam <fabio.estevam@....com>,
Philipp Zabel <pza@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Lothar Wassmann <LW@...o-electronics.de>
Subject: Re: [PATCH v2 03/10] pwm: imx: Rewrite imx_pwm_*_v1 code to
facilitate switch to atomic pwm operation
On Tue, Nov 01, 2016 at 06:57:23AM +0100, Lukasz Majewski wrote:
> Hi Sascha,
>
> > The current assumption as discussed by Philipp and me is that the ipg
> > clk is only needed when the pwm output is driven by the ipg clk
> > (MX3_PWMCR[16:17] = MX3_PWMCR_CLKSRC_IPG)
>
> At least on my setup (i.MX6q) the ipg clock (ipg_clk) don't need to be
> explicitly enabled in the ->apply() callback (in the pwm-imx.c) when
> MX3_PWMCR_CLKSRC_IPG (0x01 - ipg_clk) is selected as the PWM source.
No. If you look in the device tree you'll see that there is no special
gateable ipg clock for the PWM. Instead the SoC ipg clock is registered
for the PWM which is not gateable.
Sascha
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