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Message-ID: <20161103145650.kl7glxcfatad5ium@pd.tnic>
Date: Thu, 3 Nov 2016 15:56:50 +0100
From: Borislav Petkov <bp@...e.de>
To: Grzegorz Andrejczuk <grzegorz.andrejczuk@...el.com>
Cc: tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
x86@...nel.org, dave.hansen@...ux.intel.com,
lukasz.daniluk@...el.com, james.h.cownie@...el.com,
jacob.jun.pan@...el.com, Piotr.Luc@...el.com,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v8: 3/4] x86/cpufeature: Add PHIR3MWAIT to CPU features
On Tue, Nov 01, 2016 at 11:14:49AM +0100, Grzegorz Andrejczuk wrote:
> Add Intel Xeon Phi x200 (KnightsLanding) cpu feature - ring 3 monitor/mwait
@tip guys: s/cpu/CPU/, s!monitor/mwait!MONITOR/MWAIT! and add a fullstop when committing.
> Signed-off-by: Grzegorz Andrejczuk <grzegorz.andrejczuk@...el.com>
> ---
> arch/x86/include/asm/cpufeatures.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 92a8308..98414c5 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -100,7 +100,7 @@
> #define X86_FEATURE_XTOPOLOGY ( 3*32+22) /* cpu topology enum extensions */
> #define X86_FEATURE_TSC_RELIABLE ( 3*32+23) /* TSC is known to be reliable */
> #define X86_FEATURE_NONSTOP_TSC ( 3*32+24) /* TSC does not stop in C states */
> -/* free, was #define X86_FEATURE_CLFLUSH_MONITOR ( 3*32+25) * "" clflush reqd with monitor */
> +#define X86_FEATURE_PHIR3MWAIT ( 3*32+25) /* Xeon Phi x200 ring 3 MONITOR/MWAIT */
> #define X86_FEATURE_EXTD_APICID ( 3*32+26) /* has extended APICID (8 bits) */
> #define X86_FEATURE_AMD_DCM ( 3*32+27) /* multi-node processor */
> #define X86_FEATURE_APERFMPERF ( 3*32+28) /* APERFMPERF */
> --
Otherwise:
Reviewed-by: Borislav Petkov <bp@...e.de>
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
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