linux-kernel - Re: [PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

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Message-ID: <20161108110148.GN1447@lahna.fi.intel.com>
Date:   Tue, 8 Nov 2016 13:01:48 +0200
From:   Mika Westerberg <mika.westerberg@...ux.intel.com>
To:     Tan Jui Nee <jui.nee.tan@...el.com>
Cc:     heikki.krogerus@...ux.intel.com, andriy.shevchenko@...ux.intel.com,
        tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
        x86@...nel.org, ptyser@...-inc.com, lee.jones@...aro.org,
        linus.walleij@...aro.org, linux-gpio@...r.kernel.org,
        linux-kernel@...r.kernel.org, jonathan.yong@...el.com,
        ong.hock.yu@...el.com, tony.luck@...el.com,
        wan.ahmad.zainie.wan.mohamad@...el.com, yunying.sun@...el.com
Subject: Re: [PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge
 support driver for Intel SOC's

On Tue, Nov 08, 2016 at 04:57:18PM +0800, Tan Jui Nee wrote:
> From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> 
> There is already one and at least one more user coming which
> require an access to Primary to Sideband bridge (P2SB) in order
> to get IO or MMIO bar hidden by BIOS.
> Create a driver to access P2SB for x86 devices.
> 
> Signed-off-by: Yong, Jonathan <jonathan.yong@...el.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

Reviewed-by: Mika Westerberg <mika.westerberg@...ux.intel.com>