linux-kernel - Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode Instruction Prevention

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20161108170034.GK3117@twins.programming.kicks-ass.net>
Date:   Tue, 8 Nov 2016 18:00:34 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     Andy Lutomirski <luto@...capital.net>
Cc:     Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
        Ingo Molnar <mingo@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        X86 ML <x86@...nel.org>,
        "linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
        Andy Lutomirski <luto@...nel.org>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Borislav Petkov <bp@...e.de>, Brian Gerst <brgerst@...il.com>,
        Chen Yucong <slaoub@...il.com>,
        Chris Metcalf <cmetcalf@...lanox.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Fenghua Yu <fenghua.yu@...el.com>,
        Huang Rui <ray.huang@....com>, Jiri Slaby <jslaby@...e.cz>,
        Jonathan Corbet <corbet@....net>,
        "Michael S . Tsirkin" <mst@...hat.com>,
        Paul Gortmaker <paul.gortmaker@...driver.com>,
        "Ravi V . Shankar" <ravi.v.shankar@...el.com>,
        Shuah Khan <shuah@...nel.org>, Vlastimil Babka <vbabka@...e.cz>
Subject: Re: [PATCH 2/4] x86: Prepare vm86 tasks to handle User-Mode
 Instruction Prevention

On Tue, Nov 08, 2016 at 08:01:39AM -0800, Andy Lutomirski wrote:
> > diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
> > index 0888a87..32b7301 100644
> > --- a/arch/x86/kernel/process.c
> > +++ b/arch/x86/kernel/process.c
> > @@ -233,6 +233,16 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
> >                  */
> >                 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
> >         }
> > +
> > +#if defined(CONFIG_VM86) && defined(CONFIG_X86_INTEL_UMIP)
> > +       if (next->vm86 && next->vm86->saved_sp0 && next->vm86->disable_x86_umip)
> > +               cr4_clear_bits(X86_CR4_UMIP);
> > +       else {
> > +               if (static_cpu_has(X86_FEATURE_UMIP))
> > +                       cr4_set_bits(X86_CR4_UMIP);
> > +       }
> > +#endif
> > +
> 
> NAK.  If this code is going to exist, it needs to be deeply buried in
> some unlikely if statement that already exists.  There's no good
> reason to penalize all context switches to support some nonsensical
> vm86 use case.

Agreed, now if instead vm86 get to emulate these instructions, this all
magically goes away..