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Message-ID: <CAAtXAHe_pz=oUpeP+t-Fy0z88LMmTeSffkD2Cbun3r+uTnmGYw@mail.gmail.com>
Date: Tue, 8 Nov 2016 09:06:10 -0800
From: Moritz Fischer <moritz.fischer@...us.com>
To: Marek Vasut <marex@...x.de>
Cc: Joel Holdsworth <joel@...webreathe.org.uk>,
Alan Tull <atull@...nsource.altera.com>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Rob Herring <robh@...nel.org>,
Devicetree List <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-spi@...r.kernel.org, Clifford Wolf <clifford@...fford.at>
Subject: Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs
Marek,
On Mon, Nov 7, 2016 at 10:53 AM, Marek Vasut <marex@...x.de> wrote:
>> On the whole, I don't think the zero-length transfers are too
>> egregiously bad, and all the alternatives seem worse to me.
>
> So why not turn the CS line into GPIO and just toggle the GPIO?
Does that work with *all* SPI controllers?
Cheers,
Moritz
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