linux-kernel - Re: [PATCH v9 7/7] KVM: x86: virtualize cpuid faulting

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Message-ID: <CAP045Ar24oEUG3XcAtyv66Ch6Mi+Sdk7AokXkaPntLHb7VbCgw@mail.gmail.com>
Date:   Tue, 8 Nov 2016 10:00:18 -0800
From:   Kyle Huey <me@...ehuey.com>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     David Matlack <dmatlack@...gle.com>,
        "Robert O'Callahan" <robert@...llahan.org>,
        Andy Lutomirski <luto@...nel.org>,
        Ingo Molnar <mingo@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>, X86 ML <x86@...nel.org>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Radim Krčmář <rkrcmar@...hat.com>,
        Jeff Dike <jdike@...toit.com>,
        Richard Weinberger <richard@....at>,
        Alexander Viro <viro@...iv.linux.org.uk>,
        Shuah Khan <shuah@...nel.org>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Borislav Petkov <bp@...e.de>,
        Peter Zijlstra <peterz@...radead.org>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Len Brown <len.brown@...el.com>,
        "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
        Dmitry Safonov <dsafonov@...tuozzo.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "open list:USER-MODE LINUX (UML)" 
        <user-mode-linux-devel@...ts.sourceforge.net>,
        "open list:USER-MODE LINUX (UML)" 
        <user-mode-linux-user@...ts.sourceforge.net>,
        "open list:FILESYSTEMS (VFS and infrastructure)" 
        <linux-fsdevel@...r.kernel.org>,
        "open list:KERNEL SELFTEST FRAMEWORK" 
        <linux-kselftest@...r.kernel.org>, kvm list <kvm@...r.kernel.org>
Subject: Re: [PATCH v9 7/7] KVM: x86: virtualize cpuid faulting

On Tue, Nov 8, 2016 at 9:53 AM, Thomas Gleixner <tglx@...utronix.de> wrote:
> On Tue, 8 Nov 2016, Kyle Huey wrote:
>> > It will simplify the MSR get/set code, and make it easier to plumb
>> > support for new bits in these MSRs.
>>
>> I'm inclined to do this for MSR_PLATFORM_INFO but not
>> MSR_MISC_FEATURES_ENABLES.  The former actually has other bits, and
>> isn't used outside the msr handling code (yet, anyways).
>> MSR_MISC_FEATURES_ENABLES doesn't have any other bits (it's actually
>> not documented by Intel at all outside of that virtualization paper)
>> and after masking bits in cpuid.c or adding a helper function the
>> complexity would be a wash at best.
>
> The feature MSR is also used for enabling ring3 MWAIT, which is obviously
> not documented either. So there is more stuff coming along....
>
> Thanks,
>
>         tglx
>

Bah :) Ok.

- Kyle