[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CA+55aFyOSHrP0--+dNB0qcoCumTP4KUd6g=2Jt3WUw_W6o+aRg@mail.gmail.com>
Date: Tue, 8 Nov 2016 22:08:37 -0800
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Feng Tang <feng.tang@...el.com>
Cc: Ville Syrjälä <ville.syrjala@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
Feng Tang <feng.79.tang@...il.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
"Wysocki, Rafael J" <rafael.j.wysocki@...el.com>,
Steven Rostedt <rostedt@...dmis.org>,
Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
"linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
Rik van Riel <riel@...hat.com>,
"Srivatsa S. Bhat" <srivatsa@....edu>,
Peter Zijlstra <peterz@...radead.org>,
Arjan van de Ven <arjan@...ux.intel.com>,
Rusty Russell <rusty@...tcorp.com.au>,
Oleg Nesterov <oleg@...hat.com>, Tejun Heo <tj@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Paul McKenney <paulmck@...ux.vnet.ibm.com>,
Paul Turner <pjt@...gle.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"Zhang, Rui" <rui.zhang@...el.com>,
"Brown, Len" <len.brown@...el.com>,
Linux PM <linux-pm@...r.kernel.org>,
Linux ACPI <linux-acpi@...r.kernel.org>
Subject: Re: S3 resume regression [1cf4f629d9d2 ("cpu/hotplug: Move online
calls to hotplugged cpu")]
On Tue, Nov 8, 2016 at 7:54 PM, Feng Tang <feng.tang@...el.com> wrote:
> On Wed, Nov 02, 2016 at 04:47:37AM +0800, Ville Syrjälä wrote:
>>
>> I left the thing running for the weekend and it failed 26 out of 16057
>> times with the 25ms timeout. Looks like it takes ~5 minutes to resume
>> when it fails, but eventually it does come back.
>
> Just came back from a travel. Yes, the 5 minutes delay may be due to the
> expiration of the HPET timer, counting from 0 to 0xffffffff for a 13M
> frequencey HPET takes about 300 seconds. After resume, it seems nobody
> arms it so my old patch forces to arm one event.
Ville, what happens if you disable HPET? Can you force the TSC with
"clocksource=tsc" or "tsc=reliable". Does resume work reliably then?
Or is this one of the CPU's where tsc just doesn't work?
Linus
Powered by blists - more mailing lists