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Message-ID: <5900275.i4NZvtxTcC@wuerfel>
Date: Wed, 09 Nov 2016 22:38:32 +0100
From: Arnd Bergmann <arnd@...db.de>
To: One Thousand Gnomes <gnomes@...rguk.ukuu.org.uk>
Cc: Mark Rutland <mark.rutland@....com>,
"zhichang.yuan" <yuanzhichang@...ilicon.com>,
catalin.marinas@....com, will.deacon@....com, robh+dt@...nel.org,
bhelgaas@...gle.com, olof@...om.net,
linux-arm-kernel@...ts.infradead.org, lorenzo.pieralisi@....com,
linux-kernel@...r.kernel.org, linuxarm@...wei.com,
devicetree@...r.kernel.org, linux-pci@...r.kernel.org,
linux-serial@...r.kernel.org, minyard@....org,
benh@...nel.crashing.org, liviu.dudau@....com,
zourongrong@...il.com, john.garry@...wei.com,
gabriele.paoloni@...wei.com, zhichang.yuan02@...il.com,
kantyzc@....com, xuwei5@...ilicon.com, marc.zyngier@....com
Subject: Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA
On Wednesday, November 9, 2016 1:54:53 PM CET One Thousand Gnomes wrote:
> > I think it is a relatively safe assumption that there is only one
> > ISA bridge. A lot of old drivers hardcode PIO or memory addresses
>
> It's not a safe assumption for x86 at least. There are a few systems with
> multiple ISA busses particularly older laptops with a docking station.
But do they have multiple ISA domains? There is no real harm in supporting
it, the (small) downsides I can think of are:
- a few extra cycles for the lookup, from possibly walking a linked list
to find the correct set of helpers and MMIO addresses
- making it too general could invite more people to design hardware
around the infrastructure when we really want them to stop adding
stuff like this.
Arnd
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