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Message-ID: <CAFLEztQNnjXeSf3qc=j3WVu4PWBoTs8-gB3oVXtVbauQaxst8Q@mail.gmail.com>
Date: Sun, 13 Nov 2016 16:18:02 +0800
From: 陈豪 <jacobchen110@...il.com>
To: Heiko Stuebner <heiko@...ech.de>
Cc: Andy Yan <andy.yan@...k-chips.com>, linux-gpio@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Jacob Chen <jacob2.chen@...k-chips.com>
Subject: Re: [PATCH 1/2] ARM: dts: rockchip: add the sdmmc pinctrl for rk1108
2016-11-13 16:13 GMT+08:00 Jacob Chen <jacob-chen@...wrt.com>:
> From: Jacob Chen <jacob2.chen@...k-chips.com>
>
> Signed-off-by: Jacob Chen <jacob2.chen@...k-chips.com>
> ---
> arch/arm/boot/dts/rk1108.dtsi | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
> index 9dccfea..6a06ad7 100644
> --- a/arch/arm/boot/dts/rk1108.dtsi
> +++ b/arch/arm/boot/dts/rk1108.dtsi
> @@ -321,6 +321,31 @@
> input-enable;
> };
>
> + sdmmc {
> + sdmmc_clk: sdmmc-clk {
> + rockchip,pins = <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
> + };
> +
> + sdmmc_cmd: sdmmc-cmd {
> + rockchip,pins = <3 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
> + };
> +
> + sdmmc_cd: sdmmc-cd {
> + rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
> + };
> +
> + sdmmc_bus1: sdmmc-bus1 {
> + rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
> + };
> +
> + sdmmc_bus4: sdmmc-bus4 {
> + rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
> + <3 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
> + <3 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
> + <3 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
> + };
> + };
> +
> i2c1 {
> i2c1_xfer: i2c1-xfer {
> rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>,
> --
> 2.7.4
>
Those patches are based on andy's patch set "Add basic support for
support for Rockchip RK1108 SOC ", assuming he will include
drive-strength functionality in pinctrl.
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