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Message-ID: <01f705f1-484b-4407-7b7a-e8e69966581f@amd.com>
Date:   Mon, 14 Nov 2016 10:51:27 -0600
From:   Tom Lendacky <thomas.lendacky@....com>
To:     "Kani, Toshimitsu" <toshi.kani@....com>,
        "bp@...en8.de" <bp@...en8.de>
CC:     "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
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        "corbet@....net" <corbet@....net>, "arnd@...db.de" <arnd@...db.de>,
        "matt@...eblueprint.co.uk" <matt@...eblueprint.co.uk>,
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Subject: Re: [RFC PATCH v3 02/20] x86: Set the write-protect cache mode for
 full PAT support

On 11/10/2016 07:26 PM, Kani, Toshimitsu wrote:
> On Thu, 2016-11-10 at 14:14 +0100, Borislav Petkov wrote:
>> + Toshi.
>>
>> On Wed, Nov 09, 2016 at 06:34:48PM -0600, Tom Lendacky wrote:
>>>
>>> For processors that support PAT, set the write-protect cache mode
>>> (_PAGE_CACHE_MODE_WP) entry to the actual write-protect value
>>> (x05).
> 
> Using slot 6 may be more cautious (for the same reason slot 7 was used
> for WT), but I do not have a strong opinion for it.
> 
> set_page_memtype() cannot track the use of WP type since there is no
> extra-bit available for WP, but WP is only supported by
> early_memremap_xx() interfaces in this series.  So, I think we should
> just document that WP is only intended for temporary mappings at boot-
> time until this issue is resolved.  Also, we need to make sure that
> this early_memremap for WP is only called after pat_init() is done.

Sounds good, I'll add documentation to cover these points.

> 
> A nit - please add WP to the function header comment below.
> "This function initializes PAT MSR and PAT table with an OS-defined
> value to enable additional cache attributes, WC and WT."

Will do.

Thanks,
Tom

> 
> Thanks,
> -Toshi
> 

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