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Message-ID: <20161115121035.GD24857@8bytes.org>
Date: Tue, 15 Nov 2016 13:10:35 +0100
From: Joerg Roedel <joro@...tes.org>
To: Tom Lendacky <thomas.lendacky@....com>
Cc: linux-arch@...r.kernel.org, linux-efi@...r.kernel.org,
kvm@...r.kernel.org, linux-doc@...r.kernel.org, x86@...nel.org,
linux-kernel@...r.kernel.org, kasan-dev@...glegroups.com,
linux-mm@...ck.org, iommu@...ts.linux-foundation.org,
Rik van Riel <riel@...hat.com>,
Radim Krčmář <rkrcmar@...hat.com>,
Arnd Bergmann <arnd@...db.de>,
Jonathan Corbet <corbet@....net>,
Matt Fleming <matt@...eblueprint.co.uk>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Larry Woodman <lwoodman@...hat.com>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Andy Lutomirski <luto@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>,
Andrey Ryabinin <aryabinin@...tuozzo.com>,
Alexander Potapenko <glider@...gle.com>,
Thomas Gleixner <tglx@...utronix.de>,
Dmitry Vyukov <dvyukov@...gle.com>
Subject: Re: [RFC PATCH v3 04/20] x86: Handle reduction in physical address
size with SME
On Wed, Nov 09, 2016 at 06:35:13PM -0600, Tom Lendacky wrote:
> +/*
> + * AMD Secure Memory Encryption (SME) can reduce the size of the physical
> + * address space if it is enabled, even if memory encryption is not active.
> + * Adjust x86_phys_bits if SME is enabled.
> + */
> +static void phys_bits_adjust(struct cpuinfo_x86 *c)
> +{
Better call this function amd_sme_phys_bits_adjust(). This name makes it
clear at the call-site why it is there and what it does.
> + u32 eax, ebx, ecx, edx;
> + u64 msr;
> +
> + if (c->x86_vendor != X86_VENDOR_AMD)
> + return;
> +
> + if (c->extended_cpuid_level < 0x8000001f)
> + return;
> +
> + /* Check for SME feature */
> + cpuid(0x8000001f, &eax, &ebx, &ecx, &edx);
> + if (!(eax & 0x01))
> + return;
Maybe add a comment here why you can't use cpu_has (yet).
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