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Message-Id: <1479304615-11360-5-git-send-email-Eugeniy.Paltsev@synopsys.com>
Date: Wed, 16 Nov 2016 16:56:55 +0300
From: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
To: devicetree@...r.kernel.org
Cc: robh+dt@...nel.org, mark.rutland@....com,
linux-kernel@...r.kernel.org, andriy.shevchenko@...ux.intel.com,
vireshk@...nel.org, dan.j.williams@...el.com, vinod.koul@...el.com,
dmaengine@...r.kernel.org, linux-snps-arc@...ts.infradead.org,
Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
Subject: [PATCH 4/4] Update device tree Synopsys DW DMAC documentation
* Rename is_private to is-private as ordered by DT policy.
The change leaves the support for the old format.
* Add is-memcpu property, so it is possible to
enable memory-to-memory transfers support via DT.
* Add hw-llp property, so it is possible to enable
hardware multi block transfers support via DT.
Fix white spaces.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
---
Documentation/devicetree/bindings/dma/snps-dma.txt | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt b/Documentation/devicetree/bindings/dma/snps-dma.txt
index 0f55832..d41d960 100644
--- a/Documentation/devicetree/bindings/dma/snps-dma.txt
+++ b/Documentation/devicetree/bindings/dma/snps-dma.txt
@@ -20,13 +20,19 @@ Required properties:
Deprecated properties:
- data_width: Maximum data width supported by hardware per AHB master
(0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
+- is_private: The device channels should be marked as private and not for by the
+ general purpose DMA channel allocator. False if not passed.
Optional properties:
- interrupt-parent: Should be the phandle for the interrupt controller
that services interrupts for this device
-- is_private: The device channels should be marked as private and not for by the
+- is-private: The device channels should be marked as private and not for by the
general purpose DMA channel allocator. False if not passed.
+- is-memcpu: The device channels do support memory-to-memory transfers. False
+ if not passed.
+- hw-llp: Multi block transfers supported by hardware per AHB master.
+ 0 (default): not supported, 1: supported.
Example:
@@ -56,7 +62,7 @@ The four cells in order are:
4. Peripheral master for transfers on allocated channel
Example:
-
+
serial@...00000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xe0000000 0x1000>;
--
2.5.5
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