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Message-ID: <CAAyFORJYaNysioJDfjPyYKx0Eh4yvgrM3GHz8e=4J1Pcdc5-Eg@mail.gmail.com>
Date:   Thu, 17 Nov 2016 14:26:37 +0800
From:   Peter Pan <peterpansjtu@...il.com>
To:     Boris Brezillon <boris.brezillon@...e-electrons.com>
Cc:     Richard Weinberger <richard@....at>, linux-mtd@...ts.infradead.org,
        David Woodhouse <dwmw2@...radead.org>,
        Brian Norris <computersforpeace@...il.com>,
        Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
        linux-kernel@...r.kernel.org,
        "peterpandong@...ron.com" <peterpandong@...ron.com>
Subject: Re: [PATCH v2 0/7] mtd: nand: Abstract away the NAND interface type

Hi Boris,

On Sun, Oct 16, 2016 at 10:35 PM, Boris Brezillon
<boris.brezillon@...e-electrons.com> wrote:
> Hi,
>
> This series is aiming at providing a generic NAND layer to share code
> between different NAND based devices.
>
> We currently have 3 different interfaces to interact with NANDs:
> - Raw NANDs
> - OneNANDs
> - SPI NANDs
>
> Apart from the way these NAND devices are accessed they have a lot
> in common, like the way the memory is organized, or their constraints.
> This is usually a good sign that some work should be done to factorize
> the code.
>
> This work has been started by Peter who wanted to re-use the BBT
> code for its SPI-NAND driver. But I think we can push it further
> other stuff (the software ECC implementation, or the way offsets are
> converted to block/page number).
>
> Peter, can you please review/test this version, and if possible, post
> the code you've done to support SPI NANDs.
>

I already finished review and test work. The BBT works well after I applied
my modification which I already sent to your by email. I tried to build a new
BBT on a new NAND and then mark one block to bad. Both works well.
My test platform is Xilinx Zed board.

I will try to rebase my SPI NAND patch on your patch and send it out.
It will take me some time because I'm quite busy with other company affairs.


Thanks,
Peter Pan

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