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Message-ID: <20161117090514.GM1446@lahna.fi.intel.com>
Date:   Thu, 17 Nov 2016 11:05:14 +0200
From:   Mika Westerberg <mika.westerberg@...ux.intel.com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc:     Lee Jones <lee.jones@...aro.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/1] mfd: intel-lpss: Try to enable
 Memory-Write-Invalidate

On Tue, Nov 15, 2016 at 12:37:04PM +0200, Andy Shevchenko wrote:
> Enable MWI mechanism if PCI bus master supports it.
> 
> It might be potential benefit in some cases. Documentation [1] says that
> standard Memory Write might supply more current data than in the CPU modified
> cache line and "trashing a line in the cache may trash some data that is more
> current that in the memory line". This allows to avoid potential retries and
> other performance degradation issues on the bus.
> 
> [1] PCI System Architecture, 4th edition, ISBN: 0-201-30974-2, pp.117-119.
> 
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

Acked-by: Mika Westerberg <mika.westerberg@...ux.intel.com>

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