linux-kernel - Re: [PATCH] ARM: Drop fixed 200 Hz timer requirement from Exynos platforms

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 17 Nov 2016 13:35:45 +0100
From:   Arnd Bergmann <arnd@...db.de>
To:     linux-arm-kernel@...ts.infradead.org
Cc:     Krzysztof Kozlowski <krzk@...nel.org>,
        Russell King <linux@...linux.org.uk>,
        Kukjin Kim <kgene@...nel.org>,
        Javier Martinez Canillas <javier@....samsung.com>,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
        Tomasz Figa <tomasz.figa@...il.com>,
        Ben Dooks <ben.dooks@...ethink.co.uk>,
        Sylwester Nawrocki <s.nawrocki@...sung.com>,
        Lee Jones <lee.jones@...aro.org>,
        Marek Szyprowski <m.szyprowski@...sung.com>
Subject: Re: [PATCH] ARM: Drop fixed 200 Hz timer requirement from Exynos platforms

On Monday, November 14, 2016 8:27:05 PM CET Krzysztof Kozlowski wrote:
> @@ -1497,7 +1497,7 @@ source kernel/Kconfig.preempt
>  config HZ_FIXED
>         int
>         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
> -               ARCH_S5PV210 || ARCH_EXYNOS4
> +               ARCH_S5PV210
>         default 128 if SOC_AT91RM9200
>         default 0

After further research, I've concluded that we should also drop the
settings for ARCH_S5PV210 and ARCH_S3C24XX here.

ARCH_S5PV210 behaves exactly like EXYNOS here, it has 32-bit timers
so there won't be any overflow with 100Hz.

For ARCH_S3C24XX, it the requirement was that HZ_100 could not
be used with the old arch/arm/plat-samsung/time.c code that would
overflow its 16-bit counter.
However, the new drivers/clocksource/samsung_pwm_timer.c configures
the clock divider to '50' instead of '6', so there is no longer
a 16-bit overflow before the 100Hz tick, it now overflows every
3.7ms for the typical 12MHz clock.

	Arnd