[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20161118145046.GT3117@twins.programming.kicks-ass.net>
Date: Fri, 18 Nov 2016 15:50:46 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Chris Metcalf <cmetcalf@...lanox.com>
Cc: John Stultz <john.stultz@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Salman Qazi <sqazi@...gle.com>, Paul Turner <pjt@...gle.com>,
Tony Lindgren <tony@...mide.com>,
Steven Miao <realmz6@...il.com>,
lkml <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] tile: avoid using clocksource_cyc2ns with absolute
cycle count
On Fri, Nov 18, 2016 at 09:24:52AM -0500, Chris Metcalf wrote:
> I would think you would also unnecessarily accumulate small errors.
True..
> The x86 sched_clock() seems to purely scale the current TSC value,
> so what tile is doing is consistent with that, at least.
Right, this comes apart the moment TSC goes faster than 1GHz though.
Which might actually be the case, because then the mult-and-shift
reduces resolution and we'd wrap before the 64bit are done.
That would be something I ought to look at some time..
Powered by blists - more mailing lists